1.1.1 Structure and Function of the Processor Flashcards Preview

Computer Science > 1.1.1 Structure and Function of the Processor > Flashcards

Flashcards in 1.1.1 Structure and Function of the Processor Deck (35)
Loading flashcards...
1
Q

What does the Arithmetic and Logic unit do?

A

The ALU completes all the arithmetical and logical operations.

2
Q

What is the Control Unit?

A

A part of the processor which directs operations inside the CPU.

3
Q

What are registers?

A

Small memory cells that operate at high speeds.

4
Q

Where do all arithmetic, logic, or shift operations occur?

A

They occur in registers.

5
Q

What does the Program Counter (PC) do?

A

The Program Counter holds the address of the next instruction.

6
Q

In which register do all calculations take place?

A

The Arithmetic and Logic Unit (ALU).

7
Q

Where are intermediate arithmetic and logical results stored?

A

In the accumulator (ACC).

8
Q

What does the Memory Address Register do?

A

Holds the address of a location that is to be read from or written to.

9
Q

What does the Memory Data Register do?

A

Temporarily stores the data that has just been read from or the data that needs to be written.

10
Q

What does the Current Instruction Register do?

A

Holds the current instruction divided up into opcode and operand.

11
Q

What is a Bus?

A

A set of parallel wires connecting two or more components together.

12
Q

What is the system bus?

A

The collection of the data bus, address bus, and control bus is called the system bus.

13
Q

What is the width of a bus?

A

The number of parallel wires it has.

14
Q

What is the data bus?

A

A bidirectional bus used to transport data and instructions between components.

15
Q

What is the control bus?

A

The bidirectional bus used to transmit control signals between internal and external components.

16
Q

What is the address bus used for?

A

Used to transmit the memory address specifying where data is to be sent from or retrieved.

17
Q

What does adding a wire to the address bus do to the number of addressable locations?

A

It doubles the number of addressable locations.

18
Q

What does Bus Request indicate?

A

Indicate a device is requesting access to the data bus.

19
Q

What does Bus Grant indicate?

A

Indicates the CPU has granted access to the data bus.

20
Q

What does memory write do?

A

Causes the data on the data bus to be written into the addressed location.

21
Q

What does memory read do?

A

Causes the data from the addressed location to be placed onto the data bus.

22
Q

What does the interrupt request control signal indicate?

A

Indicates that a device is requesting access to the CPU.

23
Q

What is the clock signal used for?

A

It is used to synchronise instructions.

24
Q

What is Assembly Language?

A

Assembly Language is a programming language where mnemonics are used to represent instructions.

25
Q

What is opcode?

A

Opcode is used to determine the type of instruction and what hardware to us to execute it.

26
Q

What is the operand?

A

The operand is the address of where the operation is performed.

27
Q

What occurs during the fetch phase?

A
  • The address from from the PC is copied to the MAR,
  • Instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1,
  • The value of the MDR is copied to the CIR.
28
Q

What occurs during the decode phase?

A

The contents of the CIR is split into operand and opcode.

29
Q

What occurs during the execute phase?

A

The opcode is executed on the data.

30
Q

What is the clock speed?

A

The number of clock cycles completed per second.

31
Q

What is cache memory?

A

Cache memory is the CPU’s onboard memory which can be accessed a lot faster than main memory.

32
Q

What is pipelining?

A

The process of the completing the fetch, decode and execute of three separate files simultaneously.

33
Q

What is Von Neumann architecture?

A

Architecture in which there is a single shared memory and shared data bus for both data and instructions.

34
Q

What is Harvard architecture?

A

Architecture in which there is two separate memory and data bused for data and instructions.

35
Q

What is contemporary processing?

A

Processing in which Von Neumann architecture is used for main memory.
Cache uses Harvard architecture, divided into instruction cache and data cache.