Characteristics Of Processors, Storage and I/O Devices Flashcards

1
Q

What is the system bus made up of

A

The address, control and data bus

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2
Q

What is meant by a bidirectional bus

A

It allows two-way connection between internal components of the system

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3
Q

What is meant by the bus width

A

Bus width is the number of parallel lines a bus has

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4
Q

What is the data bus used for

A

To transfer data and instructions between components

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5
Q

What is the address bus used for

A

To specifiy the address of a memory location to either read or write data to that memory location

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6
Q

Is the address bus bidirectional or unidirectional

A

Unidirectional

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7
Q

What is meant by a unidirectional bus

A

There is only a one way connection between the component and the bus

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8
Q

What is the role of the control bus

A

Transfers control signals used to manage the operations that take place inside a computer system

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9
Q

What does the control signal, memory read, do

A

Places data from a specific memory location onto the address bus

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10
Q

What does the control signal, memory write, do

A

Stores data from the data bus onto a specific memory location

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11
Q

What does a bus request do

A

Signifies a component requires access to a bus

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12
Q

What does a bus grant do

A

Signifies a component has been given access to a bus it had requested

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13
Q

What does a bus busy signal do

A

Signifies that a bus s not available for use

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14
Q

What does an interrupt request do

A

Signifies that an error or exception has occurred that requires immediate attention from the processor

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15
Q

If a data bus has a width of 8, how many bits can it transfer per second

A

8 bits

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16
Q

If an address bus has a width of 8, how many bits can it transfer per second

A

2⁸ bits

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17
Q

What the role of the control unit

A

Organises the sequence in which program instructions are executed

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18
Q

What is the role of the ALU

A

Performs arithmetic calculations and logical operations (Add, Sub, NOT, XOR, binary shifts etc)

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19
Q

What is the role of the system clock

A

Oscillates between 0 and 1, which synchronises all operations

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20
Q

What is a register

A

Fast access memory that stores frequently used data

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21
Q

Name the 5 special registers

A

PC
CIR
ALU
MAR
MDR

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22
Q

Give an example of a general purpose register

A

Accumulator

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23
Q

What happens during the fetch phase of the FDE cycle

A
  1. Address in PC copied to MAR
  2. Data at address copied to MDR
  3. Simultaneously the PC increments by 1
  4. Data in MDR copied to CIR
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24
Q

What happens during the decode phase of the FDE cycle

A
  1. CU decodes data in CIR
  2. Data is split into opcode and operand
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25
What is the significance of opcode and operand
Determines how the instruction is carried out
26
How does having multiple cores improve performance
More data processed simultaneously, as each core can execute FDE cycles independently
27
Why more cores not impact performance
The impact depends on the nature of the task. Not all programs are designed for multi core processing
28
Describe L1 cache
Part of the circuitry of the cores, the smallest but fastest cache
29
Describe L2 cache
Part of the circuitry of each core, larger than L1 but slower
30
Describe L3 cache
Slower than L2 but larger, built next to processor on motherboard
31
Why is it advantageous for cache to be part of the circuitry of each core
Reduces the time taken for data to pass through registers
32
What is clock speed a measure of
The amount of state changes per second, 0 to 1, which determines the amount of cycles per second
33
What is overclocking
Performing more instructions per second than the recommended amount
34
What is the negative of overclocking
Causes the processor to overheat
35
Describe pipeling
Where one instruction is being executed, another is decoded and a third is being fetched
36
What is the advantage of pipeling
Components don't remain idle, improving efficiency and therefore performance
37
Give 2 things Von nuemann architecture consists of
3 from: A processor Shared memory unit connected to processor I/O controller Shared address and data bus
38
Give 2 features of harvard architecture
Instructions and data have separate memory locations Uses different address/ data bus for Instructions and data
39
Give two advantages of von nuemann architecture over harvard
Cheaper More flexible
40
Give one advantage of harvard architecture over von nuemann
Can simultaneously read/ write data while getting instructions, stopping components from being idle
41
Describe the instruction set of a RISC processor
Simple commands that each take the same time to execute, where one instruction is carried out per clock cycle
42
Why do RISC processors take up more storage when carrying out basic tasks compared to CISC
Due to the simple instructions, several are needed to execute the task which requires more memory and also takes up more time
43
Give 2 positives of RISC having simpler instructions
1. Makes it easier to implement pipeling 2. Requires less circuitry, so cheaper and less power used
44
Describe the instruction set of a CISC processor
Large number of instructions which are complex and take varied lengths to execute
45
Does RISC make good use of RAM
No, it uses a lot of RAM to store instructions which can cause system bottlenecks
46
What is an input device
A peripheral used to provide data and control signals to a computer system
47
What is a biometric device
A device that uses physical traits of a person such as finger prints and facial ID to gain access to a device
48
What is biometric spoofing
A term used to describe a method of fooling biometric scanners
49
How do sensors convert analogue signals into digital form
Using an ADC, analogue to digital converter
50
Give 2 examples of sensors in a mobile phone
Two from: Ambient light sensor GPS receiver Magnetometer Gyroscopes Accelerometers
51
What is the purpose of an RFID (radio frequency identifier)
Allows data to be transmitted wirelessly over radio waves
52
Describe the composition of an RFID tag
Made up of an antenna, for sending and receiving radio signals A chip that processes the signals It's own unique identifier
53
How does a barcide reader work
Illuminates the barcode. More light is reflected by the white area and this light us captured by photoelectric cells which generate a binary value that corresponds to the bar code
54
What is an output device
A peripheral that reproduces or displays data/ information from a computer system
55
What criteria should be considered when choosing a suitable printer
Speed Print resolution Quality of colour reproduction Paper handling Cost of consumables
56
What is printer resolution measured in
Dots per inch (dpi)
57
Give two examples of non-contact printers
Inkjet printer Laser printer
58
Compare inkjet printers to laser printers
Use liquid ink, laser user powdered ink (toner) Slower than laser printers Can produce photo quality images, laser can't
59
Give 3 advantages of SSDs over HDDs
Faster access speed Lower risk of mechanical failure due no moving parts Less energy consumption due to less moving parts Silent operation
60
Give 3 advantages of HDDs over SSDs
Larger capacity Longer lifespan Cheaper
61
Give 2 advantages of optical media
Cheap Portable
62
Give two disadvantages of optical media
Susceptible to damage (scratching, exposure to sunlight) Low storage capacity in general
63
Describe cloud storage
Where data is managed by commercial organisations and stored outside of your computer system
64
Give 1 Pro and con of cloud storage
Pro: Convenient Con: Performance based on Internet connection
65
What us the maximum amount of RAM dependent on
The width of the address bus
66
Give 3 instances of parallel processing
Pipelining Array/ vector processing Multicore processing
67
Describe array/ vector processing
SIMD (single instruction multiple data) Uses multiple ALUs to perform one instruction on a large data set simultaneously
68
Describe multicore processing
MIMD (multiple instruction multiple data) Each cpu has multiple cores/ each computer has multiple CPUs e.g. a supercomputer
69
What is a co-processor used for
To perform routine mathematical tasks, freeing time for the core processor to perform separate tasks