Computer Architecture Flashcards

(132 cards)

1
Q

What does FDE cycle stand for?

A

Fetching, Decoding and Executing

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2
Q

What was ENIAC?

A

World’s first general-purpose electronic computer

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3
Q

Who developed concept of subroutine?

A

Kathleen Antonelli

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4
Q

What does Computer Architecture Involve?

A

Combining hardware components to build functional computers

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5
Q

What are CPUs made of?

A

Binary - collection of 1s and 0s

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6
Q

What early electromechanical computer was built using standard telephone relays?

A

Automatic Relay Calculator

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7
Q

What is the purpose of logic gates?

A

To process inputs and generate specific outputs, helping problem-solving and debugging

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8
Q

True or False: Von Neumann Architecture uses the same memory location for both instructions and data

A

True

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9
Q

True or False: ENIAC programmers were allowed full access to the machine whilst coding

A

False

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10
Q

True or False: All CPUs follow different architectures

A

False

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11
Q

True or False: Computer Architecture is only concerned with aesthetics and not functionality

A

False

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12
Q

What is binary language made of?

A

1s and 0s

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13
Q

Who partly invented the Analytical Engine - first mechanical computer?

A

Charles Babbage

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14
Q

What were the four main components of the Analytical Engine?

A

Mill
Store
Reader
Printer

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15
Q

What was the first programmable electronic computer?

A

ENIAC

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16
Q

What does SSEM stand for and where was it built?

A

Small Scale Experimental Machine, which was built in Manchester, England

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17
Q

What was the first practical stored-program computer that was used regularly?

A

Cambridge EDSAC

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18
Q

When was the IBM Personal Computer released?

A

12th August 1981

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19
Q

What does Von Neumann Architecture store in its memory?

A

Both data and instruction

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20
Q

What is the main advantage of Harvard Architecture over Von Neumann?

A

Separate instruction and data memory, reducing bottlenecks and enhances speed

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21
Q

True or False: The Analytical Engine was an electronic computer

A

False

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22
Q

True or False: ENIAC was programmed using switches and cables

A

True

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23
Q

True or False: The Manchester Baby was the first computer with internal storage

A

True

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24
Q

True or False: Cambridge EDSAC ran its first program in 1948

A

False - ran in 1949

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25
True or False: Harvard Architecture is more cyber-resilient than Von Neumann
True
26
True or False: Multi-core processors allow parallel execution of tasks
True
27
True or False: FLOPS measures number of binary instructions per second
False - measure floating point operations per second
28
True or False: Increasing the clock rate always makes a computer faster
False
29
What is the main purpose of Information Coding?
Achieve simplicity in computer hardware design
30
What does ASCII stand for?
American Standard Code for Information Interchange
31
How many bits are used in ASCII coding?
7 bits
32
What is Unicode used for?
To represent more complex characters by using more bits
33
What happens when you multiply a decimal number by 10?
Shift left one place
34
What is sign and magnitude method used for?
Representing negative numbers in binary
35
In Sign and Magnitude, what does leftmost bit represent?
1 - negative 0 - positive
36
What is the purpose of Excess - n notation?
To code a number by adding an excess value to it and decode by subtracting the excess
37
What is the main difference between sign and magnitude and excess-n?
Excess-n regains a storage slot and avoids two representations of 0
38
What are the two parts of floating-point number?
Mantissa: Dictates the precision Exponent: Represents the range
39
True or False: Information coding makes computer hardware more complex
False
40
True or False: ASCII uses 8-bit binary codes
False
41
True or False: Excess-n uses a sign flag to represent negative numbers
False
42
True or False: In sign and magnitude, two representations of 0 exist
True
43
True or False: In fixed-point representation, half of the columns are reserved for the fractional part
True
44
True or False: Increasing the range of a floating-point number sacrifices its precision
True
45
What are the four basic binary logical operators in Boolean logic?
AND (^), OR (+ or V), NOT (¬), XOR (⊕)
46
What is the output of an AND operation?
TRUE if and only if all inputs are TRUE.
47
What is the output of an OR operation?
TRUE if any of the inputs are TRUE.
48
What is the output of a NOT operation?
TRUE if and only if the single input is FALSE.
49
What is the output of an XOR operation?
TRUE if an odd number of inputs are TRUE, otherwise FALSE.
50
Why are truth tables useful in Boolean logic?
They help visualize and understand the output of logical operations for all possible input combinations.
51
What is a NAND operation?
The inverse of AND: A NAND B = (A AND B)'
52
What is a NOR operation?
The inverse of OR: A NOR B = (A OR B)'
53
Why are NAND and NOR gates commonly used in circuit design?
They simplify design and are cost-effective since one type of component can replace multiple standard logic gates.
54
What is De Morgan’s Law?
A rule that relates AND, OR, and NOT operations: (AB)’ = A’ + B’ and (A+B)’ = A’B’
55
How do you apply De Morgan’s Law to a Boolean expression?
Negate the overall expression, negate each sub-expression, and flip operators: AND ↔ OR.
56
What are the steps in designing a logic circuit?
1. Write the truth table. 2. Derive a Boolean expression (sum of products). 3. Translate the expression into logic gates.
57
What is a Karnaugh Map (K-Map)?
A visual method for simplifying Boolean expressions in sum of products form using a grid where each square represents a possible input combination.
58
What is the process of using a Karnaugh Map?
1. Choose the template for the number of inputs. 2. Place 1s in squares where output is 1. 3. Group adjacent 1s into rectangles (1, 2, 4, 8, etc.). 4. Aim for larger and fewer groups.
59
What are the grouping rules in a Karnaugh Map?
Groups must be 1, 2, 4, 8, etc. squares; groups may overlap; and larger, fewer groups simplify expressions better.
60
What is the role of the ALU?
The ALU performs arithmetic and logic operations like add, subtract, multiply, divide, shifts, AND, OR, NOT, XOR, and comparisons.
61
What are the two main components inside an ALU?
Registers and Status Flags.
62
What are status flags in an ALU?
Bits in a flag register indicating outcomes of operations, such as overflow, zero, and negative results.
63
When is the Overflow flag in the ALU set?
When an arithmetic operation produces a result too large for the available number of bits, typically when adding two numbers of the same sign results in a different sign.
64
What is the function of Zero and Negative flags in the ALU?
Set by arithmetic operations to help determine the outcomes of conditional decisions, like IF statements.
65
What is a Half Adder?
A circuit that adds two bits, producing a Sum and a Carry output.
66
What is the formula for the Sum in a Half Adder?
A ⊕ B (XOR)
67
What is the formula for the Carry in a Half Adder?
A ^ B (AND)
68
Why is a Full Adder needed?
Because multi-bit addition requires adding three bits: two input bits and a carry from a previous stage.
69
How does a Full Adder work?
By combining two Half Adders and an OR gate to produce a Sum and Carry Out (Cout).
70
What is the equation for the Sum in a Full Adder?
Cin ⊕ (A ⊕ B)
71
What is the equation for the Carry Out (Cout) in a Full Adder?
(A ^ B) OR (Cin AND (A ⊕ B))
72
What is a Ripple-Carry Adder?
A multi-stage full adder where each carry output is connected to the carry input of the next stage.
73
What is the main drawback of a Ripple-Carry Adder?
It is slow because each stage must wait for the previous carry bit.
74
What is a Carry-Select Adder?
An adder that speeds up addition by splitting the operation into lower and upper halves and calculating both possible carry scenarios in parallel.
75
How does a Carry-Select Adder improve speed?
It computes the upper half with two sets of adders assuming carry-in of 0 and 1, selecting the correct result after determining the actual carry.
76
How is subtraction performed in the ALU?
Using two's complement addition.
77
How can multiplication and division be handled by an ALU?
In software using addition and subtraction, or in hardware with long multiplication and division methods.
78
How are logic operations like AND, OR, and NOT performed in the ALU?
Built directly from logic gates.
79
What does the Overflow flag indicate?
If the sum of two numbers with the same sign produces a result with a different sign, indicating overflow.
80
What is the formula for detecting overflow in addition?
Cin ⊕ Cout
81
What does bit shifting enable in ALU operations?
Simple multiplication or division by powers of two, optimizing addition-based multiplication methods.
82
What are the four types of bit shifting operations?
Arithmetic Shift, Logical Shift, Rotate, and Rotate through Carry.
83
What is an Arithmetic Shift?
A shift operation that preserves the sign bit during shifting.
84
What is a Logical Shift?
A shift operation that moves bits left or right, filling the empty bit positions with zeros.
85
What is a Rotate operation?
A shift where bits that fall off one end are put back on the other.
86
What is a Rotate through Carry operation?
Similar to a Rotate, but includes the carry flag in the rotation.
87
What is an Instruction Set Architecture (ISA)?
The interface between hardware and software, defining the set of commands a processor can understand.
88
What key factors does an ISA define?
Available instructions, available registers, number of operands, operand sizes and types, and how operands are accessed.
89
What is an Accumulator-based ISA?
An ISA where most instructions operate on two operands: a register (the accumulator) and a memory location.
90
What is a General-Purpose Register (GPR) ISA?
An ISA with multiple registers where most instructions access operands through registers and memory in various combinations.
91
What is a Reduced Instruction Set Computer (RISC)?
An ISA with a small number of instructions, common operand formats, where instructions (except LOAD and STORE) operate on registers and take one clock cycle.
92
What is a Stack-based ISA?
An ISA where instructions only access operands at the top of a stack using PUSH and POP operations.
93
What is the MIPS 1 ISA?
A RISC-based instruction set developed by MIPS Technologies, first released in 1985, featuring arithmetic, logic, data transfer, and control transfer instructions.
94
How many general-purpose registers does MIPS32 have?
32 general-purpose registers.
95
How many bits does each MIPS32 register hold?
32 bits.
96
What is a limitation of MIPS 1 ISA?
No floating-point capabilities.
97
What is the role of MIPS Data-Transfer Instructions?
To enable data transfers in both directions between main memory and registers.
98
What is the role of MIPS Control-Transfer Instructions?
To allow changes in the sequential flow of execution, handling jumps, branches, and procedure calls.
99
What is the Fetch-Decode-Execute (FDE) cycle?
The continuous process where the CPU fetches the next instruction, decodes it, and executes it.
100
What are registers in a CPU?
Small, fast storage areas within the CPU that hold data being worked on.
101
Why are arithmetic and logic instructions designed to work on registers instead of main memory?
Because registers are much faster than main memory.
102
What is a General-Purpose Register?
A register used for any temporary data storage during program execution.
103
What is a Special Register?
A register reserved for specific control or status functions within the CPU, such as the Program Counter or Stack Pointer.
104
What is the Program Counter (PC)?
A special register that holds the memory address of the next instruction to be executed.
105
What happens to the Program Counter after each instruction is fetched?
Its value increments to point to the next instruction.
106
How does the Program Counter behave with control-transfer instructions?
It changes to a new address, causing the CPU to jump to a different part of the program.
107
What is a subroutine?
A reusable sequence of instructions called from multiple places in a program, which eventually returns to the calling location.
108
Why can’t return addresses for subroutines be hardwired?
Because subroutines are called from many different locations.
109
How does the CPU manage return addresses for subroutines?
It records the current PC value before jumping to the subroutine, and restores it after the subroutine finishes.
110
What problem occurs with nested subroutines?
Multiple return addresses need to be managed, making a simple single storage location insufficient.
111
What is the solution to nested subroutine calls?
A stack.
112
What is a stack in computer architecture?
A Last-In-First-Out (LIFO) data structure mapped to adjacent memory locations for managing return addresses and temporary data.
113
What does the Stack Pointer register do?
It holds the address of the top of the stack.
114
What are the two primary operations you can perform on a stack?
PUSH (insert a value onto the stack) and POP (remove a value from the stack).
115
What is an Instruction Set Architecture (ISA)?
The interface between hardware and software that defines the set of instructions a processor can understand and execute.
116
What key factors does an ISA define?
Available instructions, available registers, number of operands required, sizes and types of operands, and how operands are accessed.
117
What is an Accumulator-based ISA?
An ISA where most instructions work on an accumulator register and a memory location.
118
What is a General Purpose Register (GPR) ISA?
An ISA with multiple registers where most instructions use registers for operands and access memory in different combinations.
119
What is a Reduced Instruction Set Computer (RISC)?
An ISA with a small number of simple instructions, where all except LOAD and STORE work on registers and typically execute in one clock cycle.
120
What is a Stack-based ISA?
An ISA where instructions operate on operands at the top of a stack using PUSH and POP operations.
121
What is the MIPS 1 ISA?
A RISC-based instruction set developed by MIPS Technologies, including arithmetic, logic, data transfer, and control transfer instructions.
122
How many general-purpose registers does MIPS32 have?
32.
123
How many bits can each MIPS32 register hold?
32 bits.
124
Does MIPS 1 have floating-point capabilities?
No.
125
What is the purpose of MIPS Data-Transfer Instructions?
To move data between main memory and registers.
126
What is the role of MIPS Control-Transfer Instructions?
To alter the default sequential flow of program execution.
127
What is the Fetch-Decode-Execute (FDE) cycle?
The continuous process where the CPU fetches, decodes, and executes instructions.
128
Why do arithmetic and logic instructions operate on registers instead of main memory?
Because registers are much faster than main memory.
129
What are General Purpose Registers?
Extra CPU registers used for holding temporary data and operands during execution.
130
What are Special Registers?
Registers with specific functions like holding the program counter or stack pointer.
131
What is the Program Counter (PC)?
A special register that holds the address of the next instruction to execute.
132
What happens to the Program Counter after each instruction is fetched?
It increments to point to the next instruction’s address.