Book Chapter 3 CPU Flashcards

This is a review of chapter 3 on the CPU

1
Q

EDB

A

External Data Bus- Primary data highway of all computers. Everything in your computer is ties either directly or indirectly to the external data bus.

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2
Q

Frontside Bus

A

On older PC architectures, the wires that connect the CPU to its external memory controller.

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3
Q

Backside Bus

A

On older CPUs, a set of wires that connected the cpu to level 2 cache. First appeared in the intel pentium pro.

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4
Q

Clock (CLK)

A

A charge on the CLK wire tells the CPU that another piece of information is waiting to be processed. A single charge to the CLK wire is a clock cycle.

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5
Q

Registers

A

Store internal commands and data. “Light bulb” within the CPU. Part of the EDB.

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6
Q

Clock Speed

A

The maximum number of clock cycles a CPU can handle in a given period of time.

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7
Q

Hertz

A

Measure of clock speed. 1 Hz = 1 cycle per second.
1 MHz = 1 million cycles per second.
1 GHz = 1 billion cycles per second.

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8
Q

RAM

A

Random Access Memory. Think of an electronic spreadsheet 1 byte across. The CPU accesses any one row of RAM as easily and as fast as any other row.

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9
Q

DRAM

A

Dynamic RAM. Computers use DRAM for main memory storage. Needs constant electrical charge and a periodic refresh of the circuits.

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10
Q

Address Bus

A

A second set of wires from the CPU called the address bus communicates with the MCC.

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11
Q

MCC

A

Memory Controller Chip. This chip handles the mechanics of retrieving a requested row of data from the RAM.

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12
Q

Clock multiplying/ Clock multiplier

A

CPU that takes the incoming clock signal and multiples it inside the CPU to let the internal circuitry of the CPU run faster. All modern CPUs run at some multiple of the system clock speed.
32 bit processing has a 4GB memory limit.
64 bit processing supports more than 4GB memory.

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13
Q

Virtualization

A

Intel and AMD have built in support for running more than one operating system at a time. CompTIA A+ objectives refer to visualization support as the “virtual technology CPU feature”.

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14
Q

Parallel Execution

A

CPU processing multiple commands and parts of commands in parallel.

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15
Q

Pipelinning

A

To get a command from the data bus, do a calculation, and then send the answer back to the data bus, it takes four steps.
1. Fetch
2. Decode
3. Execute
4. Write

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16
Q

Cache

A

L1 L2 L3 L4

17
Q

Throttling

A

Process of modifying the operating characteristics of a processor based on current conditions.

18
Q

Sockets

A

Commonly implemented processor sockets include the following

19
Q

CPU installation troubleshoot

A