Cache Memory Flashcards

1
Q

Explain the Storage Hierarchy

A

This is a pyramid with the fastest memory on top and the slowest on the bottom. Also the higher up the pyramid, the more it costs and the less capacity there is.

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2
Q

What is Direct Mapping?

A

A memory block J can only be placed in one place I in the cache. It is easy to look up and the translation is simple.

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3
Q

What is Associative Mapping?

A

It is a mapping technique where it is allowed to write blocks anywhere in cache (we are free to choose where)

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4
Q

Explain the (k-way) Set Associative Mapping

A

The cache gets divided into v=2^d sets, each containing k (= C/v) lines. Each block in memory will be allowed to be located into only one of these sets.

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5
Q

In Set Associative Mapping, give some special values for k

A

If k == 1 -> direct caching
If k == C -> associative caching
K is usually very small and sufficient to reduce trashing

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6
Q

Replacement Algorithms: what and why?

A

These are algorithms to determine where to replace a value in cache. We need this because with associative cache, we can chose where to put a block. This algorithm must be very efficient in hardware.

Optimal -> replace lines that are less likely needed in the future -> not implementable

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7
Q

What is the Random Replacement Algorithm?

A

It is a simple algorithm. There is no work at hit. It is not very intelligent and susceptible to thrashing.
It is provable the worst case algorithm in certain contexts

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8
Q

What is the FIFO Replacement Algorithm?

A

We replace the oldest line first because we have the assumption that those are requested least frequently in the future. For the implementation only one pointer is required. There is less thrashing.

  • Replace oldest line
  • oldest = least requested in future
  • one pointer required
  • less trashing
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9
Q

What is the LRU algorithm?

A
  • Replace least recently used line
  • Best algorithm in certain context
  • Very effective against trashing
  • Does not use frequency info
  • Sensitive to scan sequence
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10
Q

What are the two Pseudo-LRU’s and why are they used?

A

Goal: Performance of LRU + simplicity of FIFO
2 variants:
- tree based
- Most recently used

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11
Q

Memory Updates: what and why

A

What: keeping cache and main memory synchronized
Why: when cache gets updated, there can be discrepancies
-> problematic, other components access directly

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12
Q

What are the 2 techniques for memory updates?

A

Write through:
- simplest but least efficient
- every update in cache gets pushed to memory
- causes extra traffic in data bus

Write back:
- flag modified cache parts with an update bit
- block out of cache -> check update bits and update memory

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13
Q

What is benchmarking?

A

Repeatedly request elements from an array A with fixed stride 2^k
Repeat this for different arrays whose size is doubled each time
Measure the average access-time for different array size and stride values

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14
Q

What is locality of reference?

A

Locality of reference refers to the tendency of the computer program to access the same set of memory locations for a particular time period. On an abstract level there are two types of localities: spatial & temporal locality

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15
Q

What is spatial locality?

A

This type of optimization assumes that if a memory location has been accessed it is highly likely that a nearby/consecutive memory location will be accessed as well and hence we bring in the nearby memory references too in a nearby memory location for faster access.

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16
Q

What is temporal locality?

A

This type of optimization includes bringing in the frequently accessed memory references to a nearby memory location for a short duration of time so that the future accesses are much faster.

17
Q

What is the Tree Based Pseudo LRU

A
  • Organize cache lines into a binary tree
  • Track bit at each split (k-1 in total)
  • Update log2(k) bits upon hit and miss (mark unfollowed branches as least recently used)
  • Will never update one of the log2(k) = r-d most recently used lines
18
Q

What is the Most-Recently-Used pseudo LRU

A
  • Keep list of k bits (one per line)
    ◦ On hit on line i, we set bit i (fast)
    ◦ On miss, we replace a line whose bit is set to 0
    ◦ If we set the last 0 to 1, then all the other bits back to 0
  • Sometimes replace a very recently used line
  • guarantee that unused lines are removed from the cache
19
Q

What are the pros and cons of a split cache that they use in current designs?

A

Split cache: separate cache for instructions and data

(+) simultaneous retrieval of information
(-) partial capacity lost depending on the needs

20
Q

Modern systems have multiple processors. Which?

A

◦ L1 cache, provided with processor chip, small but very fast
◦ L2 cache, a bit larger than L1 but slower
◦ L3 cache, shared between cores, larger but slower