Computer Architecture Flashcards

1
Q

Central Processing Unit

A

The CPU processes instructions and data that are input into the computer so that the result can be output

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2
Q

Microprocessor

A

A type of integrated circuit on a single chip

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3
Q

Stored-program concept

A
  • Both data and instructions are stored in the same memory unit (RAM) as binary
  • CPU uses the FDE cycle to execute instructions serially
  • Programs can be moved to AND from the main memory
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4
Q

Units in CPU

A
  • arithmetic logic unit (ALU)
  • control unit (CU)
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5
Q

Registers in CPU

A
  1. program counter (PC)
  2. memory address register (MAR)
  3. memory data register (MDR)
  4. current instruction register (CIR)
  5. accumulator (ACC)
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6
Q

buses in CPU

A
  • address bus
  • data bus
  • control bus
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7
Q

Registers meaning

A

a type of small memory which holds data temporarily, to be processed.

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8
Q

Program Counter function

A

stores the address of the next instruction to be fetched from memory.

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9
Q

MAR function

A

Stores addresses of next instruction

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10
Q

MDR

A

stores the data and instructions which has just been fetched from memory
or data which is to be written to memory

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11
Q

CIR

A

stores the current instruction currently being decoded and executed

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12
Q

ACC

A

temporarily stores the results of the calculations performed by the ALU

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13
Q

Address Bus:

A

unidirectional- transmits addresses between components in the CPU

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14
Q

Data Bus:

A

bidirectional- transmits data between components in the CPU

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15
Q

Control Bus:

A

bidirectional- transmits control signals from the control unit to other components in the CPU

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16
Q

CPU performance

A
  • Core
  • Cache
  • Clock
17
Q

Core

A
  • They process instructions.
  • Each core performs separate FDE cycles independently from one another simultaneously, meaning parallel processing can take place.

More cores→ enables multitasking → more instructions executed simultaneously → faster and better performance.

  • The more cores in the CPU, the better and faster the performance
18
Q

Cache characteristics

A
  • Type of storage
  • Used for storing frequently used instructions/data
  • To speed up data access time
  • Faster to access than RAM
  • Has different levels e.g L1-L3
  • Increasing the amount of cache→more data can be stored there→more data accessed faster→ improves performance.
19
Q

Clock Speed

A

the maximum number of FDE cycles a CPU can execute in a second

20
Q

Clock speed characterisics

A
  • Measured in Hertz
  • MHz- million instructions per second.
  • GHz - billion instructions per second.
  • so 3.4GHz = 3.4 billion FDE cycles per second
21
Q

Overclocking

A

using a clock speed higher than the computer was designed for:

  • Operations become unsynchronised (computer would crash often)
  • Lead to serious overheating of the CPU
22
Q

Increasing clock speed:

A
  • Improves performance
  • more FDE cycles can be processed in a second
23
Q

How to improve data bus performance

A

Lengthen data bus wire

24
Q

Embedded systems

A

combination of hardware and software which is designed to carry out a specific set of tasks

25
Q

Embedded system characteristics

A
  • Performs a single task
  • It has a microprocessor
  • It has dedicated hardware
  • works without human intervention
  • Non-programmable devices
26
Q

Purpose and process of embedded systems

A

Purpose: to control the device and allow a user to interact with it

Process:
- Input from the user is sent to the microprocessor
- Microprocessor then sends signals to actuators to perform task (output)

27
Q

Advantages of embedded systems:

A
  • Small in Size, can easily fit into devices
  • Low cost to make
  • Very fast reaction to changing input
28
Q

Disadvantages of embedded systems:

A
  • Difficult to upgrade
  • The interface can be confusing
  • Troubleshooting is a specialist’s job
29
Q

Process of FETCH

A

– Program counter (PC) holds address of the instruction
– The address held in PC is sent to MAR
– using address bus
– PC is incremented by one
– The instruction is fetched and sent from main memory to MDR
– using the data bus
– Instruction sent from MDR to CIR

30
Q

DECODE

A

The instruction in the CIR is decoded, by the Control unit, into an opcode and an operand

31
Q

EXECUTE

A
  • The instruction is executed by the ALU and the opcode is performed upon the operand.
  • The result is stored in the accumulator or written to a memory location within memory