I/O Devices Flashcards

1
Q

How does reading/writing data from/into IO devices occur?

A
  • Through processor (programmed I/O) where processor reads or writes data in bytes or words from/into a a register into the controller of the IO device
  • Or direct memory access (DMA) where the controller can autonomously access the memory via the bus.
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2
Q

Give an overview of the steps of an IO operation through the processor

A
  • IO operation is triggered
  • Processor loads the corresponding register in the IO device controller (type of OP read or write, source, target and status)
  • After completion of the operation, processor is informed by a special signal (Interrupt)
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3
Q

How is the IO operation completion interrupt processed/analyzed? What are the main two approaches in handling interrupts?

A

Processor stops its normal execution when an interrupt signal arrives.
Processor then needs to know which device caused the interrupt (source) and why the interrupt has happened (end of transmission, error) when starting its interrupt handling subroutine.

The main two approaches are:

  • Sequential interrupt processing (FCFS): This allows to mask all or specific types of interrupts during the handling of an interrupt, delaying the processing of further interrupts only after the current interrupt handling is complete.
  • Nested interrupt processing: Interrupts have priority classes where higher priority interrupts can interrupt the handling of lower priority interrupts.
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4
Q

Describe the steps during an interrupt handling

A
  • Save return address (next instruction) of current thread/process to stack
  • Load program counter (PC) with entry address of interrupt handling routine (from interrupt vector table that contains addresses of all interrupt handlers).

Now we are in the interrupt handling:

  • Save all register contents to stack
  • Perform necessary actions according to type of interrupt
  • Load register contents from stack
  • return to interrupted program (by loading return address into PC
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5
Q

What is the program counter (PC)?

A

In a CPU, The program counter (PC) is a register that manages the memory address of the instruction to be executed next. The address specified by the PC will be + n (+1 for a 1-word instruction and +2 for a 2-word instruction) each time one instruction is executed.

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6
Q

What is data transport portioning?

A

It means that data transport usually takes place in smaller portions. Bit via single, Byte via byte serial interface, block (512 byte 8 kb) between storage devices.

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7
Q

How is a data transport request handled?

A
  • The transport request is triggered by the control unit by providing the direction, source (on control unit) and target (device) as well as the length of the data to transport.
  • The device then executes the request and starts moving data from source to target addresses portion by portion.
  • When completed, the device indicates that the request has been completed (via interrupt)

The data to transport might be included in the transport request itself, if there is only few bytes to transport (also depending on the device itself). Otherwise, transport request is separated from actual data transport.

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8
Q

How is device activity integrated into thread interaction in regards to transport completion and error handling.

A

When the device sends interrupt upon completion. The interrupt handling of sends this information to the requesting thread (that is blocked because it is waiting for the device to complete the data transfer).

In case of an error, the device triggers the appropriate interrupt for that error and the CPU handles it accordingly.

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8
Q

How are control and transport parameters, indication and notification flow across device boundaries?

A

Either:

  • Deposited in main memory: dedicated memory addresses are used as registers for device communication and can be read and written by the device.
  • Deposit in device: Device disposes of registers that can be read and written by the processor using special I/O instructions.

This is how the CPU and I/O device communicate.

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9
Q

What is a driver and what is its role? How is it realized? How does the interaction occur between driver and program/user thread on one hand and the device on the other? Explain the concept of aggregation and disaggregation? What happens when driver gets many requests from different user threads?

A

It is an intermediate component between the program (thread) and the device. When a program requests to transport data to/from device, the request is sent to the driver which processes it and sends it to the device. It allows to confine all device related activities to that single component.

The driver is usually realized as an independent thread that communicates with the program (via parallelism or single, double or circular buffering by continuously and incrementally communicating with the driver) and the actual device via interrupts. (completion triggers an interrupt on the driver thread and not directly on the program’s thread).

The user thread sends a requests for data transport to the driver which processes the parameters of the request and decomposes them if necessary and loads into I/O registers then sends the request to the device and waits for its response (which can be triggered via interrupt), performs progress analysis (to check if there were any errors and if yes, handle them accordingly by delaying, repetition or aborting the request) and finally sends the response back to the user thread.

For the devices operating byte-wise, the driver often aggregates individual set of characters (received from device) into a block to be sent to the user thread and disaggregates blocks received from process into individual characters to be sent to the device.

When receiving many requests, the driver lines them up in a queue at entry and processes them one request at a time in the order of their arrival (except when handling with a mass storage driver).

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10
Q

Hard Disk Drivers: Describe its geometry, how files should be read/written into it, describe strategies for hard disks and how are they realized with help of the driver? Why is delay time caused and how to reduce it?

A

Structure:
One or more platters with magnetizable surfaces that rotate at high speed (3k-10k RPM). It has a read-write head held by an arm for each magnetizable surface that can be moved back and forth. Different arms are attached to a broom. Each surface consists of concentric tracks on which data is recorded and each track is composed of many sectors where each sector can store specific amount of data (0.5 or 4 kb).

! The entirety of the tracks that can be read/written with the same arm position is called cylinder. A hard drive cylinder refers to a group of tracks on a hard disk drive that are located at the same position on each disk surface.

Files on a HDD should occupy contiguous sectors on adjacent tracks since this makes reading/writing into these sectors much less time consuming since latency is usually because of repositioning the arm to find the tracks from which to read/write into.

Strategies include:
- FCFS: process requests in order of arrival
- SSTF: Shortest Seek Time First: Always select request with shortest arm positing time
- Elevator (SCAN): Like SSTF but only in one direction
- Cyclic Elevator Strategy (SCAN-C): Like SCAN but return to track 0 when reaching highest track number.
SSTF/SCAN are generally the best but it can lead to starvation of request for marginal tracks. FCFS is generally the worst.

Realization of non-FCFS strategies is done by sorting of requests according to track number. This can be done at the driver’s entry channel requiring a special entry channel or in the driver itself. This also requires parallelism between request acceptance and request processing: pipelining!

Driver gets blocked if it submits a requests to the device and only gets deblocked when that request is answered (via interrupt) so that the driver can submit next request. Here we can use a two-phase driver that puts access to device data (registers) as a critical section under mutual exclusion and decomposing the driver into two phases, where first phase creates new requests and second is responsible for progress analysis of these requests and have them run in parallel. One can also employ Read-Ahead to read more than currently requested because the probability that neighboring/next sectors will be requested is high and since this requires negligible arm movement time, it would have small cost. This would require the extra read blocks to be cached in device or main memory.

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11
Q

SSD: Describe its structure, vs HDDs and discuss some of its strategies/characteristics.

A

Solid State Drivers: They have no mechanical components but rather they use integrated circuit assemblies as memory to store data persistently. They can be constructed from RAM but need additional precautions against power loss to make it non-volatile but they are mostly constructed from non-volatile NAND-based flash memory chips/blocks (where each flash block has flash pages where actual data is stored).

vs HDDs: much lower random access time, start up time, read latency, higher data transfer rate.

  • Flash Page Mapping: The SSD controller maps logical block addresses (LBA) into flash pages in the SSD where flash pages can be reassigned to different LBAs.
  • No Updating flash pages in place: When deleting an occupied valid flash page, it becomes invalid and on next write operation to that flash page, it has to reset to an empty page first. So updating does not happen in place.
  • Garbage Collection: select block with lowest number of valid pages and clean it. For the valid pages in that block, have them re-written.
  • Wear Leveling: LBAs are mapped to different flash block as soon as they are re-written. They can also be remapped to different block when they are not written for a certain time. This is because flash blocks wear out by writing to them so they reach their end of life much earlier. To sustain good write performance, the SSD would perform garbage collection on blocks before their mapped sectors are rewritten.
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12
Q

RAID: What is it? and what is the problem/risk with using it?

A

Redundant Array of Independent Disks: They are large number of (inexpensive) hard disks that appear to the user as one device. The data is spread across the physical disks. The goal is to get performance benefit by using parallelism and increase fault tolerance by employing redundancy between the inexpensive disks.

RAID has to be realized in a fault tolerant way because a large number of disks means an increased probability of failure. To realize this this it calculates and stores error correcting codes alongside redundant disks.

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