Topic 7 - Computer organisation and architecture

Question 1

What do the internal components of a computer system do?
Give some examples

Answer 1

They are the hardware required to process data and to allow the processor to communicate with other devices (external).

Main components are the processor, main memory and input/output controllers
They are connected by the system bus (address bus, data bus, control bus)
Secondary storage provides permanent storage for programs and data

Question 2

Describe the role of the processor (CPU) in a computer system

Answer 2

The part of the computer that processes data by executing program instructions

At processor level these are low-level instructions in the form of machine code that the CPU has been designed to handle based on a specific processor instruction set

For instructions to be executed, they must be transferred from secondary storage to main memory, where they can be fetched, decoded and executed. Data can also be provided by I/O devices via the I/O controllers

Question 3

Describe the role of main memory in a computer system

Answer 3

Memory that can be accessed directly by the processor

Each memory location (where instructions/data are stored in binary) has a physical address - a number used to locate it and access its contents

There are two types :
- RAM - working memory used by the CPU in the FDE cycle
- ROM - used in the boot process for the computer system

Question 4

What are the roles of Input/Output controllers in a computer system

Answer 4

All external (peripheral) devices are connected to the CPU via I/O controllers

Provide the mechanisms for input data to be received for processing from input devices + the results of computation to be output from the system to output devices

Also connect secondary storage devices to the processor

Question 5

Describe how Input/Output controllers work

Answer 5

CPU can’t attach directly to peripheral devices as they all operate in different ways at different speeds using different electronic signals so I/O controllers act as an interface

Provide a set of addressable registers that both the processor + I/O device can access

Physical port on the controller provides a connection for the peripheral. Controller circuitry facilitates the exchange of data as electrical signals between processor + peripherals. Translates signals into correct form + provides a buffer for the difference in speeds

Each peripheral needs a device driver - a piece of software providing a software interface for the device, enabling the OS to access functions of the hardware without being configured for it.

Question 6

What is a bus?
What is a system bus?
What are external buses?

Answer 6

A communication system used to transfer data between components. Connects components

A set of parallel connections allowing internal components to communicate + exchange data. In Von Neumann architecture this is made from an address, data and control bus.

Connect peripherals to the processor. Can be serial or parallel

Question 7

Describe the features of the data bus in Von Neumann architecture

Answer 7

A bidirectional bus used to transfer data and instructions
The width of the bus is its number of parallel lines - it determines the number of bits that can be transferred in one operation
If the width is n bits, n bits can be transferred at once

Question 8

Describe the features of the address bus in Von Neumann architecture

Answer 8

A unidirectional bus used to specify the address of a memory location to read from / write to
One way connection from the CPU to the bus and a one way connection from the bus to other components
The width determines the number of bits that can be used to form an address
If the width is n bits, there are 2^n addresses, so it determines the maximum memory capacity of the system (addressable space)

Question 9

Describe the features of the control bus in Von Neumann architecture

Answer 9

A bidirectional bus used to send control signals that manage operations in the system
Can:
- request communication between 2 units
- acknowledge communication requests
- synchronise operations with clock pulses
- send interrupt requests
- specify the type of data being transferred by other buses
- send memory read/write requests
- send bus requests

Question 10

What is computer architecture?

Answer 10

The structure and organisation of a computer system. Specifies the components that make it up and how they are interconnected

Question 11

What is the stored program concept?

Answer 11

A program must be resident in main memory to be executed.
Machine code instructions are fetched sequentially and executed one at a time by the processor

Question 12

Why is the stored program concept important?

Answer 12

Originally programming was performed by manually setting a large number of switches then entering input data. Very inefficient and time consuming. Every time a new calculation was programmed the places of the switches changed + the previous program lost so the system had to be reprogrammed for every new input

Issues solved by the stored program concept. It introduced a memory unit that could store programs + data. Meant a processing unit could fetch + execute multiple instructions = versatile machines

Question 13

Describe the features of Von Neumann architecture

Answer 13

Used in many modern-day systems, consisting of a processor, main memory unit, I/O controllers + secondary storage connected by buses

Uses an address bus to identify locations + a data bus to transfer their contents. Uses a control bus to synchronise + control operations

Same address and data buses are used to transfer both instructions and data between main memory + the processor

Question 14

Describe the features of Harvard architecture

Answer 14

Keeps instructions + data in separate memories + accesses them using separate data + address buses
Used mostly in embedded systems

Question 15

What are the benefits of Harvard architecture?

Answer 15

• Instruction + data memories can be accessed simultaneously = less time waiting = increased processor performance
• Avoids bottleneck of single data/address buses
• Instruction + data memories can be adapted to meet the needs of a particular system (different sizes, word lengths, type of technology etc)
• Systems with pre-determined uses can store instructions as ROM to protect against hackers

Question 16

What are the disadvantages of Harvard architecture?

Answer 16

• More complicated
• More expensive (more hardware)
• More suited to embedded systems than general purpose computers when the uses aren’t pre-determined

Question 17

What are the advantages of Von Neumann architecture?

Answer 17

• More flexible use of main memory - allows processors to run a variety of programs not known in advance
• More simple
• Cheaper (less hardware)

Question 18

What are the disadvantages of Von Neumann architecture?

Answer 18

• Can have traffic on data / address buses
• Hackers can disguise malware as data that the processor executed unknowingly
• Instructions and data must have the same word length

Question 19

What are the main components of the processor?

Answer 19

• Arithmetic Logic Unit (ALU)
• Control Unit (CU)
• Clock
  Registers:
• General Purpose Registers
• Program Counter (PC)
• Current Instruction Register (CIR)
• Memory Address Register (MAR)
• Memory Buffer Register (MBR)
• Accumulator
• Status Register (SR)

Question 20

Describe the role of the ALU in the processor

Describe the role of the CU

Answer 20

Responsible for performing arithmetic calculations and logical operations, including binary shifts + boolean comparisons

Organises the sequence in which program instructions are executed + decodes instructions (analyses opcode + operand to determine what needs to be done).
Uses control signals to allow data to be read from/written to main memory + determine the operation the ALU will carry out at each instance

Question 21

Describe the role of the clock in the processor

Answer 21

Generates regular clock pulses by emitting a signal that continuously oscillates between a low (0) and high (1) state

Used to synchronise component operations.

A rising edge is a change from low to high state, a falling edge is vice versa. The time taken between 2 sequential rising edges is the clock period = 1 clock cycle

Each operation takes a different number of clock cycles to execute.

Clock rate/speed/frequency is the number of clock cycles per second = 1/clock period, measured in Hz

Question 22

What are processor registers?
What are general purpose registers?
What are dedicated/special purpose registers

Answer 22

Locations of computer memory within the processor providing extremely fast access

Temporarily store the results of intermediate calculations - some are connected to the ALU

Processor based registers used for a specific purpose, used in the FDE cycle

Question 23

What is the role of the:
- PC?
- CIR?
- MAR?

Answer 23

• Holds the address of the next instruction to be executed by the processor
• Holds the instruction currently being executed
• Temporarily holds the address of the memory location that the processor needs to access

Question 24

What is the role of the:
- MBR?
- Accumulator?
- SR?

Answer 24

• Sometimes called the Memory Data Register, temporarily holds data that is being read from / written to memory
• Stores the final result of any calculation processed by the ALU
• Stores information about the result of the last instruction that the ALU executed. Each bit acts as a flag to indicate if an error or exception has occurred, or to enable/disable interrupts to be raised

Question 25

What is the FDE cycle?

Answer 25

The cycle that occurs every time an instruction is carried out but first program instructions must be translated into machine code and loaded into main memory.
At the end of each cycle, the processor checks the SR to see if an error, exception or interrupt needs to be handled

Question 26

Describe the fetch stage of the FDE cycle

Answer 26

• Address of next instruction copied from PC to MAR
• MAR connected to address bus. Address placed on the bus + the CU instructs a memory read operation to transfer contents of the memory address
• Instruction held at that address transferred to MBR via data bus
• PC incremented to hold address of next instruction
• Contents of MBR copied to the CIR, so the MBR is available for use in the execute stage if necessary

Question 27

Describe the decode stage of the FDE cycle

Answer 27

• CU decodes the instruction held in the CIR
• Involves splitting the instruction into opcode and operand to determine what type of instruction needs to be executed, checking if additional data is required from memory + figuring out where they are kept

Question 28

Describe the execute stage of the FDE cycle

Answer 28

• Instruction is executed using necessary processor components
• ALU for maths/logic operations, MAR + MBR for accessing data from main memory
• General purpose registers + SR is updated

Question 29

What is an interrupt?

Why are they used?

Answer 29

A signal sent to the processor to request immediate attention. When the processor receives one, it suspends what it is doing and runs the process associated with the interrupt

It is the OS’ job to allocate processor time to processes based on factors including when it was requested, the importance of the task and its length. Unsuitable for processes that must perform tasks almost immediately so devices use interrupts

Question 30

Give some reasons for processor interrupts

Answer 30

• Hardware device has signalled it has data to process
• Hardware device has completed a task it was asked to do
• Software process needs a service to be provided / OS function to be performed
• An allotted amount of time has expired + an action needs to be performed
• A hardware failure has occurred + needs to be addressed

Question 31

What is an Interrupt Service Routine (ISR)?

Answer 31

OS will have one designed to process each interrupt.
A mini-program designed to respond to an interrupt’s request - can be built into the OS or provided by device drivers

Question 32

What happens when the processor receives an interrupt?

Answer 32

• Completes the current FDE cycle running
• Saves the current contents of processor registers to memory
• Identifies origin of interrupt to call the appropriate ISR
• Puts lower priority interrupts on hold to allow ISR to finish
• Updates PC with address of first instruction of ISR
• Reloads processor registers with the values held in memory when ISR is complete
• Re-establishes lower-priority interrupts
• Continues the FDE cycles of the original program

Question 33

What are the factors affecting processor performance?

Answer 33

• Multiple cores
• Cache size
• Clock speed
• Word length
• Data bus width
• Address bus width

Question 34

How does the number of cores affect processor performance?

Answer 34

Computers with multiple processing units are multicore.
Generally more cores = more instructions it can execute simultaneously = program runs more quickly
However system must divide tasks between cores which takes time + parallel processing (1 task per core at once) isn’t possible with some programs

Question 35

How does cache size affect processor performance?

Answer 35

Cache = volatile memory used to store frequently used instructions.
More cache = less instructions need to be held in RAM, which is further from CPU so slower.
4 levels of cache:
- L1 is smallest + fastest, located within each core
- L2 is larger + slower, shared by cores
- L3/4 - largest + slowest, on or near processor

More cache levels = more efficient system. Closer cache to processor = quicker access.
BUT cache memory is expensive + can’t be easily upgraded/replaced

Question 36

Describe how clock speed affects processor performance

Answer 36

Processors measured in terms of clock speed. Greater speed = instructions carried out faster. But it is a theoretical maximum - unlikely that system will perform to greatest stated number

Overclocking (making processor perform more instructions per second than recommended) could make processor overheat

Question 37

Describe how word length affects processor performance

Answer 37

Word length = amount of data that can be handled at one time by processor. Always a multiple of 8.

It determines:
- Size of a bit pattern that can be transferred to/from main memory in one go
- Size of processor registers = word length
- Width of data bus = word length
- Each addressable memory location is size of word length so each word identified using a unique memory address

Larger word length = more data transferred to CPU in 1 pass = less passes = quicker

Question 38

Describe how data bus width affects processor performance

Answer 38

Larger data bus = more bits transferred between internal components simultaneously = better processor performance.

Also means larger values can be transmitted between internal components - if the width is n bits, the max number that can be transmitted in one go is 2^n

Means that the bus can transmit larger numbers in 1 fetch = fewer delays when retrieving data.

Majority of systems have data bus width = word length as the contents of every addressable memory location can be transferred in one go

Question 39

Describe how address bus width affects processor performance?

Answer 39

Determines the number of bits that can be used to form a memory address, so the number of addressable memory locations.

Greater width = more main memory available = less reliance on slow virtual memory = quicker

Only increases performance if all instructions/data can’t be held in main memory