1.1 The characteristics of contemporary processors, input, output, and storage devices Flashcards
(29 cards)
control unit
part of processor that controls activity of all other components
. directs flow of data between CPU and other devices
. carries out next instruction
. sends memory read and write requests to main memory on control bus and other command and control signals
. makes extensive use of the status registers and clock
. coordinates and communicates with all parts of the CPU
Buses
consists of a series of connectors that transfer signals between internal components. consists of 8,16,32,64 lines
system bus
consists of three separate buses carrying control signals, addresses and data
control signals include:
memory read
memory write
bus request
bus grant
clock
Memory read
causes data from the addressed location in RAM to be placed in a data bus
Memory write
causes data on data bus to be written into the addressed location in RAM
Bus request
indicates that a device is requesting use of data bus
Bus grant
shows CPU has granted access to the data bus
Clock
Used to synchronise operations
Arithmetic logic unit (ALU)
the problem solving part of the processor. Performs arithmetic, logical and shift operations on data
Program counter (PC)
holds the address of the next instruction to be executed
. could be next instruction in a sequence
. could be address to jump or branch - this would be copied from CIR
Has a very close relationship with the MAR. at the start of new FDE cycle the address held in PC is copied to MAR
Memory address register (MAR)
holds the address memory location from where data or an instruction is to be fetched or where data is to be written
sends these address to memory down the address bus
Memory data register (MDR)
used to temporarily store the data which is read from, or written to memory
can be knows as memory buffer register (MBR) and nicknamed gateway to the processor
all data to and from memory must travel down data bus and pass through the MDR
current instruction register (CIR)
holds current instruction being carried out
contents of MDR are copied to CIR if it’s an instruction
contains opcode and operand of current instruction
instruction = opcode + operand
Accumulator
One of the general-purpose registers that a CPU has
Stores data and control information
Results of calculations carried by ALU can be stored here
Address bus (unidirectional)
carries from CPU to main memory
carries memory addresses that
identify where data is being read from or written to
Data bus (bidirectional)
carries the binary numbers that make up the actual info being transmitted around CPU
Control bus (bidirectional)
carries commands and control signals to and from everywhere in the CPU
Computer
something that takes an input processes the data and produces and output
FDE cycle - Fetch
PC is checked for next instruction address
Address is copied in MAR
sent along address bus to main memory and waits for control bus
Control unit sends read signal along control bus to main memory
Contents stored in address can be sent to MDR along data bus
Data received by MDR gets copied to CIR
FDE - Decode
Instruction in CIR is decided by decode unit
instruction is 2 parts opcode and operand
opcode - what to do
operand - what to do it to
operand can contain actual data or the address
decode instruction and see which operation is needed
FDE - Execute
send address to MAR
send address on address bus to main memory
contents stored in address is sent along data bus to MDR
contents of MDR is copied to accumulator
instruction now complete
Optical storage advantages
Cheap
Lightweight
Portable
Optical Storage disadvantages
Slow access times
Prone to scratches
