1.1.1 Architecture Of The CPU Flashcards
(9 cards)
Fetch Decode Execute Cycle
Instructions are fetched from the RAM (Random Access Memory)
Instructions are decoded using the CPU’s instruction
Instruction is executed
Cycle is then repeated
ALU (Arithmetic Logic Unit)
Carries out arithmetic operations (add, subtract, multiply, divide, shifts)
And logical operations (NOT, AND, OR)
CU (Control Unit)
Decodes and execute the instructions
Cache
Is very (very) fast memory with a very fast read/write speed - holds recently/frequently used instructions that have been fetched from RAM
Register
A very very very small memory circuit
Accumulator (ACC)
Temporary store that holds data/instructions that has been inputted form the keyboard or is due to be outputted to the screen, or has been calculated by the ALU
Program Counter (PC)
Increments once every fetch decode execute cycle, holding the address of the next instruction to be loaded
Memory Address Register (MAR)
Holds the address of the memory location that the processor needs to access (either to read or write data)