System Buses Flashcards
What is a system bus?
A system bus is a single computer bus, that connects the major components of a computer system.
What does a system bus to?
The system bus combines the functions of
-a data bus to carry information.
-an address bus for us to determine where it should be sent.
- a control boss to determine its operation.
Address Bus
A collection of wires connectingCPUwithmain memory (RAM)
Address bus is used to identify locations (addresses) in main memory.
The width of the address bus (number of wires) determines the amount of addressable memorylocations.
If the width of the address bus is doubled then the amount of addressable memory is squared.
Addressable memory is calculated as 2 to the power of the number of address lines.
Address bus is unidirectional.
Only holds memory addresses….Not the actual data!!!
All lines of the address bus work together
More on Address Bus
Anaddress busis a series of lines connecting two or more devices that is used to specify aphysical address.
When aCPUorDMA-enabled device (sound card for example) needs to read or write to a memory location, it specifies that memory location on the address bus .
The actual data (value) to be read from or written to is sent on thedata bus).
The width of the address bus determines the amount of memory in a system that can be addressed.
A system with a 32-bit address bus can address 232(4,294,967,296) memory locations.
If each memory address holds one byte, the addressable memory space is 4 GB.
Data Bus
A data bus is a computer subsystem that allows for the transferring of data from one component to another on a motherboard or system board, or between two computers.
This can include transferring data to and from the memory, or from the central processing unit (CPU) to other components.
Each one is designed to handle so many bits of data at a time. The amount of data a data bus can handle is called bandwidth.
Holds the actual data to be written (sent) to memory from CPU
Hold the information that is has been read (taken) from memory (instruction, result or calculation)
As a result of both read & write – Data bus is bidirectional
More on Data Bus
*Typical data bus 32-bits wide.
*This means that up to 32 bits of data can travel through a data bus every clock cycle.
*All lines of the data bus work together i.e. a32-bitbus has 32 wires or connectors that transmit 32 bits simultaneously (referred to asinparallel).
*It would be considered “32-bits wide.”
Control Bus
Theoretically…not a true bus but more of a collection of lines which operate independently of each other
It carries control & status information between devices & CPU i.e. one line of the control bus may be the read/write line.
If the wire is low (no electricity flowing) then the memory is being read from (read operation).
If the wire is high (with electricity flowing) then the memory is being written to (write operation).
The number and type of lines in a control bus varies but there are basic lines common to all CPUs, such as:
Control Bus
Read - A single line that when active indicates the device is being read by the CPU.
Write - A single line that when active indicates the device is being written by the CPU.
Byte enable- A group of lines that indicate the size of the data (word size (8, 16, 32, 64 bytes)).
Additional lines are CPU-dependent, such as:
Control Bus
TransferACK(“acknowledgement”). Delivers information that the data was acknowledged (read) by the device.
Bus request. Indicates a device is requesting the use of the (data) bus.
Bus grant. Indicates the CPU has granted access to the bus.
Interruptrequest. A device with lowerpriorityis requesting access to the CPU.
Clock signals. The signal on this line is used to synchronize data between the CPU and a device.
Control Bus
Reset. If this line is active, the CPU will perform ahard reboot.
An NMI is often used when response time is critical an example here is the handling of special cases like system resets.
Explain term ‘Interrupt process’
An interrupt is a signal that is sent to the processor to request immediate attention. When the processor receives this request, it suspends what it is doing and runs the process associated with the interrupt.
is a request for the processor to interrupt currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted, the processor will suspend its current activities, save its state, and execute a function called an interrupt handler (or an interrupt service routine, ISR) to deal with the event. This interruption is often temporary, allowing the software to resume[a] normal activities after the interrupt handler finishes, although the interrupt could instead indicate a fatal error.
