CSO2 ARITHMETIC

Question 1

INTEGERS
1.one’s complement
2.two’s complement

Answer 1

signs(MSB):0==positive, 1==negative
sign extend: copy MSB to the left
1.1’s complement (reverse all bits)
range: [- (2^ (n - 1) - 1) , 2^ (n - 1) - 1]
negative= positive wit MSB replaced to 1
problem: there is a negative zero(we lose range)
2. 2’s complement (reverse all bits and add 1)
range: [- (2^ (n - 1)) , 2^ (n - 1) - 1]
! we dont have negative zero

-> 2’s complement is the way computers represent integers

Question 2

INTEGER ADDITION

Answer 2

bit1 xor bit2 -> carry if both are one
numbers can be both positive and negative

overflow if:
-both are pos and MSB == 1
-both are neg and MSB == 0

overflow handling:
-ignore with unsigned

-exception:
—>store program counter (PC) to exception program counter (EPC)
—>jump to predetermined handler address and execute
—>mfc0(move from coprocessor register) to recover EPC value after exception handling

Question 3

INTEGER MULTIPLICATION

Answer 3

(a)a0a1a2a3 * (b)b0b1b2b3
same as regular multiplication:
if 1 copy if 0 all 0s
gives len(a) + len(b) bit result and is stored in hi and lo registers (mfhi, mflo instructions to get the result in usable registers)

in terms of circuit (optimized):
-reg1=a (32 bits)
-reg2= product and b(stored at 32 LSBs)
–step 1: check reg2 LSB
–step 2: if LSB=0 goto step 3, if LSB=1 add reg1 to 32 MSBs of reg2
–step3: shift reg2 right
–step 4: goto step1if not 32nd repetition

Question 4

INTEGER DIVISION

Answer 4

a(dividend) / b(divisor) = c(quotient) + d(remaining)
same as regular division:
gives len(a) + len(b) bit result and is stored in hi and lo registers (mfhi, mflo instructions to get the result in usable registers)

in terms of circuit (optimized):
-reg1=b (32 bits)
-reg2(left)=d, reg2(right)=c
–step0: initialize reg2 to a(dividend)
–step1: shift reg2 left
–step2: reg2(left)-reg1
–step3:
—>if reg2<0:
—-1)reg2(left)+reg1 (restore initial value)
—-2)shift reg2 left, set LSB=0
—>if reg2>=0:
—-shift reg2 left, set LSB=1
-step4: if not 32nd repetition goto step1
-step5: shift reg2(left) right

Question 5

FLOAT

Answer 5

1bit sign | 8/11bit exponent | 23/52bit fraction/significand/mantissa
scientific notation - normalization: sign 1.ddddd… * 2^xxxx…
first bit of mantissa is always 1 so its omitted
exponent has bias(127/1023) to ensure exp value is non signed number
real exp= exp-bias

denormals:
use 0 as first digit of mantissa to represent smaller numbers
has 2 representations of 0
does gradual underflow with decreasing precision

reserved values:
exp:111111… mantissa:000000.. ==infinity
exp:000000… mantissa non 0 ==NaN(not a number)

Question 6

FLOAT ADDITION

Answer 6

1. make exp equal -> shift num with smaller exp right so that we lose the smaller numbers digits in rounding
   2.add mantissa
   3.normalize and check overflow
   4.round if overflow and renormalize

circuit: (a+b=c)
-reg1=a (32 bits)
-reg2=b (32 bits)
-reg3=c (32 bits)
–step1: reg1(exp)-reg2(exp)
–step2:
—>if res =0 goto step3
—>if res <0 set control 01
——shift reg1(mantissa) right , reg1(exp)+=1
—>if res >0 set control 10
——shift reg2(mantissa) right , reg2(exp)+=1
–step3: reg1(mantissa)+reg2(mantissa)
–step4: normalize(shift reg3(mantissa) left till first bit is 1, reg3(exp)-1 with every shift) and check overflow
–step5: if overflow round and normalize

Question 7

FLOAT MULTIPLICATION (& DIVISION)

Answer 7

1. add exponents: exp1 + exp2 -127
   ->in reality it is: (realexp1+127) + realexp2+127) - 127 = realexp1 + realexp2 + 127 ==exp3 (biased)
2. multiply mantissa and place point as in decimal multiplication ignoring the sign
3. normalize and check overflow
4. round and renormalize if necessary
5. calculate sign: 00, 11 -> sign=0, 10, 01 -> sign=1