Integrated Circuits Flashcards

1
Q

Draw the voltage ranges for transistors

A
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2
Q

Draw a PNP transistor in
Phyiscal
Two-diode
Circuit Symbols

A
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3
Q

Draw an NPN transistor in
Physical
Two-diode
Circuit Symbol

A
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4
Q

What are the 3 regions of operation for BJT’s

A

Active - Amplifier
Saturation - ON
Cut Off - OFF

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5
Q

What is an advantage of NMOS over PMOS

A

More dense, faster

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6
Q

What is an advantage of CMOS over NMOS and PMOS?

A

Less dense, faster, lower power

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7
Q

Is NMOS pull up or pull down?

A

Pull down

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8
Q

Is PMOS pull up or Pull down?

A

Pull up

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9
Q

What is a semi-conductor?

A

A device which has electrical conductivity between an insulator and a conductor. When a driving voltage is applied, it can flip open and closed to permit or deny the flow of current.

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10
Q

What is Moores Law?

A

Transistor density doubles every 2 years

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11
Q

List 3 types of chips

A

PLD
CPLD Complex Programmable Logic Devices
FPGA Field Programmable Gate Arrays

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12
Q

Define Fan Out

A

The maximum number of standard logic inputs that can be fed from an output of the previous logic gate or transistor

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13
Q

What can be used to increase fan out

A

buffer

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14
Q

What is propagation delay?

A

Delay to switch a transistor from 0 to 1 or 1 to 0

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15
Q

What is t_PLH?

A

Delay from 0 to 1

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16
Q

What is T_PHL?

A

Delay from 1 to 0

17
Q

What is I_cc

A

Power supply current

18
Q

What is TTL

A

Transistor Transistor Logic

Uses BJT’s.

19
Q

What is the Fan Out of a BJT

A
20
Q

What is ECL?

A

Emitter Coupled Logic

Uses BJT’s kept below saturation to allow lower gate delays.

21
Q

What are some factors of ECL?

A

Transistors never saturate

-0.8V to -1.7V for 1 and 0

Large noise margin 250mV

22
Q

What are MOSFETs

A

Uses FET (Field Effect Transistors) with MOS (metal Oxide Semi Conductors)

23
Q

Draw a PMOS. If V_G = 0, is the gate On or Off?

A
24
Q

What happens if you apply a positive voltage to a PMOS? A negative voltage?

A

PMOS uses holes to conduct so applying a negative charge will attract holes, allowing it to conduct.

Ie its the opposite of the P.

25
Q

Draw an NMOS. When V_G = 0, is the gate open or closed?

A
26
Q

What is CMOS?

A

Uses both PMOS and NMOS to make combinational logic gates.

27
Q

What advantages and disadvantages of TTL?

A

PRO: Can be high speed or low power.

CON: Slow due to saturation

28
Q

What are advantages and disadvantages of ECL?

A

PRO: Fast because it does not saturate/
CON: High Power

29
Q

What are advantages and disadvantages of MOSFETs?

A

PRO: Cheap, dense, low power

CON: Slow