2506 Midterm Review

Question 1

format for R-type instruction

Answer 1

op rs rt rd shamt funct

Question 2

format for I-type load/store instruction

Answer 2

op rs rt 16-bit imm

Question 3

format for J-type branch instruction

Answer 3

op 26-bit imm

Question 4

rt register

Answer 4

2nd source register

Question 5

rs register

Answer 5

1st source register

Question 6

rd register

Answer 6

destination register

Question 7

load command specifies destination

Answer 7

first

Question 8

store command specifies destination

Answer 8

last

Question 9

beq

Answer 9

branch on equal

Question 10

bne

Answer 10

branch on not equal

Question 11

instructions that take 2 registers

Answer 11

addi
lw
beq

Question 12

instructions that take only an immediate

Answer 12

j

Question 13

instructions that take 3 registers

Answer 13

add, or

Question 14

how long are MIPS instructions

Answer 14

32 bits

Question 15

shamt

Answer 15

shift amount

Question 16

for an I-type instruction, where is content written?

Answer 16

in $rt

Question 17

how is the appropriate address calculated from an I-type instruction?

Answer 17

the contents of $rs is fetched to the ALU and added to the immediate field

Question 18

how many bits is an opcode?

Answer 18

6 bits

Question 19

what does a memory unit do?

Answer 19

store instructions and data values

Question 20

what does a register do?

Answer 20

store instructions and data values within the processor

Question 21

what does an ALU do?

Answer 21

implement basic operations

Question 22

what do multiplexors do?

Answer 22

allow selection among different choices for operands and data values

Question 23

what does a control unit do?

Answer 23

decode instructions and manage other elements during execution

Question 24

what does a sign extension unit do?

Answer 24

widen values from 16 to 32 bits

Question 25

what does a shift unit do?

Answer 25

perform multiplication by a power of 2

Question 26

What inputs does a memory unit take?

Answer 26

a 32 bit address that will be accessed | a 32 bit data value to be written to that address (when memwrite is on)

Question 27

What is the output of a memory unit

Answer 27

32 bit value that was read from the given address

Question 28

what are the 2 controls within a memory unit?

Answer 28

MemWrite MemRead Both contain a single bit and indicate whether or not the address should be written to or read from

Question 29

where are registers organized in the MIPS architecture?

Answer 29

a register file

Question 30

what are the register file inputs?

Answer 30

two 5 bit numbers specifying the two registers to be read from one 5 bit register number to be written to 32 bit data value to be written into the target register

Question 31

what are the register file outputs?

Answer 31

two 32 bit data values that were read from the read registers

Question 32

what is the control component of the register file?

Answer 32

RegWrite | 1 bit indicating whether the write register should be written to

Question 33

what is the ALU input?

Answer 33

two 32 bit operands

Question 34

what are the ALU outputs?

Answer 34

one 32 bit result computed | one 1 bit signal indicating whether the result was zero

Question 35

what is the ALU control?

Answer 35

a multi bit signal selecting which of the supported operations the ALU will perform on the operands

Question 36

what is the ALU control?

Answer 36

a multi bit signal selecting which of the supported operations the ALU will perform on the operands

Question 37

Control unit input?

Answer 37

6 bit opcode

Question 38

Control unit output?

Answer 38

currently unknown number of 1 bit signals to other elements

Question 39

Control unit output?

Answer 39

currently unknown number of 1 bit signals to other elements

Question 40

Why do we need 16-32 bit sign extenders?

Answer 40

hardware adders require their operands to be the same width so the immediate operand needs to be larger than 16 bits

Question 41

Why do we need shifters?

Answer 41

We need to shift left 2 because when executing beq, the offset used to calculate the target address has to be multiplied by 4, equivalent to a left shift of 2

Question 42

what does ALU do for each type of instruction?

Answer 42

R - report result of operation I - report address to be read from/written to J - report comparison of registers and branch target address

Question 43

how is the address set for the next instruction fetch?

Answer 43

PC + 4 (for R/I type) OR branch target OR jump target

Question 44

what does PC do?

Answer 44

store address of next instruction to be fetched, sends it to the interface for the instruction

Question 45

Why does PC get incremented by 4?

Answer 45

to move on to the next instruction

Question 46

where in the memory is rs?

Answer 46

25:21

Question 47

where in the memory is rt?

Answer 47

20:16

Question 48

where in the memory is rd?

Answer 48

15:11

Question 49

where in the memory is op?

Answer 49

31:26

Question 50

where in the memory is funct?

Answer 50

15:0

Question 51

what does control do for R-format instructions?

Answer 51

tell ALU control to use the funct bits and sets RegWrite to 1

Question 52

what does ALU control do for R-format instructions?

Answer 52

sets ALU to the correct operation

Question 53

what does control do for load instructions?

Answer 53

tell ALU control to add operands and sets RegWrite to 1

Question 54

Why do multiplexors exist in the MIPS architecture?

Answer 54

They prevent conflicts with the write location and the data sent to the ALU

Question 55

RegDst

Answer 55

selects the write register number (rd for load or rt for R) dont care for store

Question 56

ALUSrc

Answer 56

selects operand for ALU (either register 2's value for R type or extended immediate for load/store)

Question 57

MemtoReg

Answer 57

selects write data for register file (either computed result from ALU for R or data read from address for load)