CS261 - Midterm 2 Flashcards

1
Q

Elements of an array are next to each other in memory

A

True

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2
Q

Does A[i] = *(A+i)?

A

True

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3
Q

C has always supported variable sized multidimensional arrays?

A

False

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4
Q

How big will int C[5] be if ints are 32 bits?

A

It will be 20 bytes long.

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5
Q

Assume array long B[10] starts at address x. What address will be B[5] be?

A

x + 40

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6
Q

Assume the address of int C[5] is in %rdx, and i is in %rcx. What is the address for C[i]?

A

(%rdx, %rcx, 4)

%rdx = base register of C[5]
%rcx = index register i
4 = an integer is 4 bytes, so the scale is going to be 4
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7
Q

Memory Addressing Mode

A
D(Rb, Ri, S)
D = Constant "displacment" of 
Rb = Base register
Ri = Index Register: Any, except for %rsp
S = Scale: 1,2,4,8
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8
Q

Assume long A[4][6]. What will the size of A be?

A

8 * 4 * 6

long = 8 bytes
4 * 6 = 24 cells

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9
Q

Assuming long A[4][6] has base address x. What will the address of A[1][0] be?

A

x + 6*8

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10
Q

All pointers in C are the same type?

A

False, like in *p; char *c;

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11
Q

Adding 1 to a pointer will always add 1 byte

A

False

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12
Q

Pointers can point to functions

A

True

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13
Q

All pointers are how many bytes?

A

8

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14
Q

To add 2 operands in y86, the must both be

A

registers

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15
Q

y86 instructions are all the same size

A

False, 1-10 bytes

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16
Q

A multiplexor

A

selects a value from a set of different data values

17
Q

Registers change value

A

When the clock signal rises

18
Q

A single logic gate implements a boolean function in hardware

A

boolean function

19
Q

We compute for the value for the next PC in

A

Fetch

20
Q

The inputs to the ALU are

A

Register A and B, or register B and a constant

21
Q

Whether we read or write during the memory stage, depends on the value of

A

the code

22
Q

CPU

A

• We have the basic components we need to
create a CPU that runs y86 programs
– ALU: Does math/logic
– Registers: Hold values for ALU
– Memory: Holds values over time
– Instruction Memory: Holds instructions
– PC register: Holds pointer to current instruction

23
Q

Instructions in Stages

A

Fetch: Read instruction from memory
• Decode: Read operands from the register file
• Execute: ALU performs operations
• Memory: Moves to or from memory are
performed if necessary
• Write Back: Results are saved to register
• PC Update: PC is set to address of next
instruction

FDEMW

24
Q

What hardware do we need for

decode?

A

Register file

25
Q

Decode

A

Values from register file sent to the ALU

26
Q

What hardware do we need for

execute?

A

ALU and condition code registers