Basic Types of CPU Flashcards
(21 cards)
Basic Types of CPU
According to Instruction Set Architecture:
- Accumulator-based
- General Purpose Register Type
- Stack Machine
- “1-operand CPU”
- the accumulator is where intermediate arithmetic and logic results are stored
- early computers were accumulator-based
Accumulator-based
Registers in an Accumulator-based CPU:
- A (accumulator)
- PC (program counter)
- X (index register) – contains address of memory data
- SP (stack pointer)
- Flags register
Convert this to acculumator-based instruction set:
z = (b - c) * d;
load b ; A <- [b]
sub c ; A <- A – [c]
mul d ; A <- A * [d]
store z ; [z] <- A
- The most common type of CPU, Intel 80x86 is of this type but with enhanced/modified features.
- Other GPR-type CPUs such as PDP-11: 16-bit registers cannot be “divided” into higher and lower bytes.
General Purpose Register (GPR) Type
Registers in a GPR Type:
- R0, R1, R2,… R7
- In PDP-11, R7 is used as PC and R6 serves as SP
- PC
- SP
- Flags
- 2-address instructions
- register-memory type:
each arithmetic instruction has two operands
destination address is always a register
source address can be either a register or a memory location
GPR Type Instruction Set
Conver this to GPR Type Instruction Set
z = b + c;
mov R0, b ; R0 <- [b]
add R0, c ; R0 <- b + c
mov z, R0 ; [z] <- R0
Any computer system that has no general purpose register and simply uses the stack for computations falls on this category.
Stack Machine
Registers in a Stack Machine:
- PC
- X (serves as Memory Address Register for operands)
- Flags
Convert this to Stack Machine Instruction Set
z = b + c;
push b
push c
add ;push(pop() + pop())
pop z
NOTE: arithmetic expressions should first be translated to postfix form to easily write a program for a stack
Basic Types of CPU
- Accumulator-based - one operand is implicitly the accumulator
- GPR-type - all operands are explicitly mentioned, which can be either a register or memory location
- Stack machine - the operands are implicitly on top of the stack
Convert this to Stack Machine Instruction Set
z = (b - c) * d;
Postfix: bc-d*
push b
push c
sub ; push(pop() - pop())
push d
mul ; push(pop() * pop())
pop z
Accumulator-based instruction set
Data Transfer:
load addr ; A <- [addr]
store addr ; [addr] <- A
Accumulator-based instruction set
Arithmetic Operations:
add addr ; A <- A + [addr]
sub addr ; A <- A - [addr]
mul addr ; A <- A * [addr]
div addr ; A <- A / [addr]
Accumulator-based instruction set
Logical Operations:
and addr ; A <- A and [addr]
or addr ; A <- A or [addr]
not ; A <- not A
not addr ; A <- not [addr]
GPR Type Instruction Set
Data Transfer:
- register <- register
mov dst, src ; dst <- src - register <- memory variable
mov dst, [src] ; dst <- [src] - memory variable <- register
mov [dst], src ; [dst] <- src
GPR Type Instruction Set
Arithmetic Operations:
add dst, src ; dst <- dst + src
sub dst, src ; dst <- dst – src
mul dst, src ; dst <- dst * src
div dst, src ; dst <- dst / src
Stack Machine Instruction Set
Data Transfer:
push data ; push immediate
push addr ; push memory var
pop addr ; pop memory var
pop X ; pop an address
Stack Machine Instruction Set
Arithmetic Operations:
add ; push(pop() + pop())
sub ; push(pop() – pop())
mul ; push(pop() * pop())
div ; push(pop() / pop())
Stack Machine Instruction Set
Logical Operations:
and ; push(pop() and pop())
or ; push(pop() or pop())
not ; push(not pop())