Digital integration 2 Flashcards
(30 cards)
What does UART stand for?
Universal Asynchronous Receiver-Transmitter
What does I2C stand for?
Inter-Integrated-Circuit
What does SPI stand for?
Serial Peripheral Interface
What does CAN-BUS stand for?
Controller Area Network Bus
What area of electronics are CAN-BUSs extensively sued within?
Automotive electronics
What is RS-232?
It is an external serial communications standard
When was RS-232 designed?
1960s
Is RS-232 an example of synchronous or asynchronous transmission?
Asynchronous
What are the voltage levels for logic signals in RS-232?
-15 to -5 for logic 0
5 to 15 for logic 1
How is UART similar to RS-232?
UART is essentially the same as RS-232 but uses generic 5v or 3.3v logic levels and can have longer frames than 8 bits
Is I2C synchronous or asynchronous?
Synchronous
What do SCL and SDA stand for in I2C?
Serial Clock and Serial Data
What is meant by an open-collector bus scheme?
By default the bus is high and any connected device may pull them low
When does an arbitration process commence in I2C?
When two devices attempt to initiate communication at the same time.
What is clock stretching in I2C?
If receiving device struggles to keep up can slow down data transfer by holding clock line low.
What are the speed rates of standard, fast mode, fast mode + and high speed mode I2C?
standard = 100kbits/s
fast mode = 400kbits/s
fast mode + = 1Mbit/s
high speed mode = 3.4Mbit/s
What is the equation for max pull up resistor for I2C bus?
R=t/(1.2C)
What is the equation for the min pull up resistor for I2C bus?
R= V supply / max Sink current R= V/3mA
Is UART full duplex, half duplex or simplex?
full duplex
Is I2c full duplex, half duplex or simplex?
half duplex
What does SPI use instead of the open-collector approach?
It uses tri-state push-pull digital outputs
What are some differences between SPI and I2C?
SPI is generally faster.
SPI doesn’t require bi-directional level-shifters.
There can only be one master device in SPI.
No arbitration process needed in SPI.
CAN uses open-collector differential signalling. What is this?
There are two conductors CAN high and CAN low. They are normally implemented as shielded twisted pair
What is the nominal line voltage of CAN? What logic level is this regarded as?
2.5V
logic high