ECE 332 Flashcards

(23 cards)

1
Q

If your goal was to minimize latency at all costs, which topology would you choose?

A

Point-to-point

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2
Q

If your data center processes data using almost entirely parallelizable operations and requires extremely high throughput and low latency, what framework should you use to cluster processors?

A

Infiniband

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3
Q

Suppose that you own a small data center that requires 5 Gbit/s connections between the servers. Your main concern is replacability of parts, as you were unable to create any strong partnerships with factories. Would you use a HSI architecture?

A

No, due to vendor lock-in and low replacability

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4
Q

To maximize energy efficiency without sacrificing performance, what kind of processor core architecture should your mobile device use?

A

Heterogeneous compute cores (e.g., big.LITTLE)

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5
Q

What dynamic power management strategy could help reduce overall energy consumption while maintaining responsiveness for a data center that handles unpredictable workloads?

A

Dynamic Voltage and Frequency Scaling (DVFS)

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6
Q

What specific engineering challenge should you warn about when using 3D chip stacking to increase memory bandwidth in an AI accelerator chip?

A

Thermal hotspots; propose microfluidic cooling or thermal-aware chip design

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7
Q

How does the yield of ‘Known Good Dies’ relate to chiplet manufacturing?

A

Higher yields of known good dies reduce waste and cost in chiplet-based manufacturing

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8
Q

What is the main difference between a traditional monolithic processor and a processor built with chiplets?

A

Monolithic processors are a single die; chiplet processors use multiple modular dies

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9
Q

Why are interconnects/packaging required in a chiplet-based system?

A

To connect the separate chiplets and ensure communication between components

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10
Q

Which multi-core approach worked best for the Xbox 360 application and why?

A

Xbox 360’s symmetric multi-core design, which was easier to program for

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11
Q

Why did Xbox decide to use an 8-way set associative cache?

A

To reduce cache misses and improve performance

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12
Q

What was the biggest takeaway each company might’ve had from this generation of consoles?

A

Sony learned the importance of developer-friendly architecture; Microsoft emphasized design simplicity

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13
Q

What is the base logic block of an FPGA?

A

Lookup Table (LUT)

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14
Q

Why are FPGAs good for real-time signal processing?

A

They offer high parallelism and can be customized for specific signal tasks

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15
Q

Why might a company choose an FPGA over an ASIC, even if the FPGA is more costly and less energy-efficient?

A

Faster time-to-market and reconfigurability

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16
Q

What issue arises in different ways of formal verification?

A

Scalability and cost increase with system complexity

17
Q

Why is it important to be able to test an entire processor?

A

To ensure correctness in safety-critical systems like medical devices

18
Q

In the context of safety-critical systems, what is semiformal verification?

A

Combines formal methods with simulation to target high-risk areas efficiently

19
Q

Who created the TPU?

20
Q

What is the forward pass prediction formula?

A

Output = Input Matrix × Weights Matrix

21
Q

Which instruction set architecture is the big.LITTLE system connected to?

22
Q

What ideals does big.LITTLE attempt to optimize at the same time through heterogeneous computing?

A

Performance and power efficiency

23
Q

Which is not an option the OS on a big.LITTLE-based smartphone has to further optimize power usage?

A

Turning off the instruction set (not a real option)