Electronics 2b - Field effect transistors

Question 1

Compare a Bipolar Junction transistor (BJT) to a Feild-Effect transistor (FET)

Answer 1

Question 2

What are the two types of Field-effect transistors (FET)?

Answer 2

1. Metal oxide field-effect transistors (MOSFET)
2. Junction field-effect transistors (JFET)

Question 3

What are the two types of JFETs?

Answer 3

• n-channel
• p-channel

Note:
* Usually JFETs are operated in depletion-mode, where they conduct current (are always on) with zero volts across the gate, unless volts supplied to gate.

Question 4

What are the four types of MOSFETs?

Answer 4

• n-channel enchancement-mode
• n-channel depletion-mode
• p-channel enchancement-mode
• p-channel depletion-mode

Note:
* enchancement-mode means that it’s always off unless a voltage at the gate is supplied
* depletion-mode means that it’s always on unless a voltage at the gate is supplied

Question 5

What are the three components of a FET that correlate to the base, source and emitter?

Answer 5

• Gate = base
• Source = emitter
• Drain = collector

Question 6

How does an n-channel JFET work?

What is its symbol?

Answer 6

When Vgate = 0:
* As shown in the picture, the n junction runs through (like a channel) the JFET
* There are two cut outs (on the top) that are p junctions
* When Gate voltage is 0, there will still be a voltage across the source and drain, Vds.
* Voltage drops from the Vsupply to 0v through the JFET and so voltage Vds = Vs. This means that voltage drops through the n-channel in the centre. (essentially acts as a series of resistors that decrease as you go down). This is why the depletion region isn’t straight going along the JFET and tapers at the lower end.
* When Vds is sufficiently high, there will be a pinch-off point, where the increasing reversed bias, causing larger depletion zones is highest for that specific gate voltage, so current across the JFET is limited and horizontal.

When Vgate < 0:
* Similar things happen, however we can now control the limited current level and increase or decrese the current by changing that voltage.
* This is because we add a negative potential, such as -1V across the two p-junctions that causes an increase in the size of the depletion zone, and greater reversed bias. We can get zero current if Vgate is low enough and current can’t flow through the gap as resistivity is so great, due to the reduction in cross sectional area.

Question 7

How does an n-channel, enchancement and depletion MOSFET work?

What are thier symbols?

Answer 7

n-channel enchancement MOSFET:
* There are two n semiconductors within a p semiconductor.
* The p semiconductor blocks the flow of electrons from the n region to the other where both n semiconductors have wires in and out of them for current flow.
* The gate is not touching the p or n semiconductors and has an insulator (oxide, SiO2) between it that causes DC input resistance to be very high.
* By supplying a sufficient Vgate, minority carriers (electrons) in the p semiconductor are drawn close to it (due to electric field) to create a ‘bridge’ almost (inverstion layer) that enables current to flow between the drain and source, between the two n semiconductors.
* The higher the Vgate, the higher the current that can flow in the drain.

n-channel depletion MOSFET:
* There are two n semiconductors that are connected ontop of a p semiconductor.
* The n semiconductors being connected allows current to flow across it with 0 volts across the gate.
* The gate is also insulated.
* The Vgate supply is inverted so electrons in between the section of n semiconductor, betwen the two main connections are pushed away by the electric field generated reducing the number of electrons available for conduction.

Question 8

How do we use an n-channel enchancement MOSFET as a comon-source amplifier?

Answer 8

Explaination of image:
* An AC input singal is provided at Vin and goes through a coupling capacitor to then eleminate bias from any DC signals in it.
* This then adds with a questant (fixed bias) voltage so that the AC signal doesn’t cut-off as signal can’t go negative in the MOSFET otherwise the forward and reversed biases will switch. This questant voltage is determined by using a potential divider style output shown below.
* Vgs is now the input signal and the quiesant voltage, this must be greater than the threshold voltage of around 1-2V to allow current to flow.
* Now fluxtuations of Vgs from the input signal will correlate to a change in current in the drain, ID, which impacts the volts lost across R3.
* The higher the current, resulting from high Vgs, the lower the output signal will be as signal is inverted.
* The final coupling capacitor is to remove the DC voltage from the signal to return it to moving around 0 V like all AC signals usually.