IO

Question 1

what’s a bus?

Answer 1

a communication pathway between components of a computer

Question 2

what’s a crossbar?

Answer 2

connects any input to any output

Question 3

what’s a bridge?

Answer 3

connects two different buses

Question 4

IO APIC is?

Answer 4

IO advanced programmable interrupt controller
the part of the processor that handles interrupts from devices

Question 5

SRAM

Answer 5

static
very fast, used to cache slower memory

Question 6

DRAM

Answer 6

dyanmic
capacitor + gate to store a bit
very dense, but slower

Question 7

VRAM

Answer 7

video
dual ported i.e. can write while another component reads

Question 8

ways to communicate with a device

Answer 8

mmapped device registers
device memory
direct memory access

Question 9

mmapped device regs

Answer 9

some ranges of physical addresses correspond to device registers
lw/sw gets status/sends instructions to a device, not RAM

Question 10

device memory

Answer 10

device has memory and OS can write to the device through the IO bus rather than an address
uses special IO instructions in and out

Question 11

DMA

Answer 11

place instructions to device in RAM
poke device by writing to its registers
device performs action and generates interrupt when done

Question 12

disadvantages of polling

Answer 12

busy waiting
xor high latency

Question 13

receive livelock is

Answer 13

CPU spends all its time handling device interrupts because packets arrive too quickly and the interrupt handler has high priority

Question 14

what are interrupt driven devices good for?

Answer 14

disk requests

Question 15

head switch times are comparable to

Answer 15

short seek times

Question 16

LBA

Answer 16

logical block addressing
disk interface presents the disk as a linear array of blocks

Question 17

CHS

Answer 17

cylinder, head, sector

Question 18

zoning

Answer 18

more sectors on larger tracks

Question 19

track skewing

Answer 19

sector 0 position varies by track to improve sequential access times

Question 20

sparing

Answer 20

flawed sectors not properly storing data are remapped to locations

Question 21

seek phases

Answer 21

speedup
coast
slowdown
settle

Question 22

avg seek

Answer 22

max_seek / 3

Question 23

FCFS tradeoffs

Answer 23

+ easy impl
+ good fairness
- cannot exploit locality to min seek time
- increases avg latency and decreases throughput

Question 24

SPTF tradeoffs

Answer 24

+ exploit locality to min seek time
+ higher throughput
- starvation
- hard to know fastest request

Question 25

idea of aged SPTF

Answer 25

give older requests higher priority

Question 26

elevator scheduling (SCAN)

Answer 26

sweep across disk, service requests as track is approached

Question 27

SCAN tradeoffs

Answer 27

+ takes advantage of locality + bounded waiting - middle tracks serviced more often - could miss locality SPTF exploits

Question 28

C-SCAN is

Answer 28

only sweep in one direction and return to the beginning again

Question 29

VSCAN(r)

Answer 29

uses effective positioning time if request not in same direction of previous seek, Teff = Tpos + r Tmax penalty for changing directions

Question 30

special values of VSCAN(r)

Answer 30

r = 0 gives SPTF r = 1 gives SCAN r = 0.2 good in practice

Question 31

interrupt driven devices

Answer 31

device interrupts processor when an event happens handler asks device what happened (data ready, buffer free, request complete)

Question 32

limitations of flash memory

Answer 32

limited number of overwrites possible random writes very expensive limited durability (charge can wear out over time)

Question 33

flash translation layer

Answer 33

FTL provides wear leveling so writing to the same logical block doesn't wear out a physical block

Question 34

NAND flash

Answer 34

used for storage high density faster erase/write times needs error correction

Question 35

NOR flash

Answer 35

faster reads in smaller data units can execute code much slower erases

Question 36

NAND flash page

Answer 36

2112 bytes - 2048 data 64 metadata/error correcting code

Question 37

NAND flash blocks

Answer 37

blocks = 64 (SLC) 128 (MLC) pages blocks divided into 2-4 planes

Question 38

NAND flash planes

Answer 38

planes can access their blocks in parallel to overlap latencies

Question 39

NAND flash read/reuse

Answer 39

can read one page at a time must erase a whole block before reusing it

Question 40

SCSI domain consists of

Answer 40

devices and an SDS bus connecting the devices

Question 41

devices in SCSI are

Answer 41

host adapters (system bus to SCSI bus) and SCSI controllers (bus to device)

Question 42

device roles in SCSI

Answer 42

initiator, target traditionally host adapter initiator and controllers targets

Question 43

SCSI request is

Answer 43

a command from initiator to target

Question 44

LUN in SCSI

Answer 44

controllers have >= 1 LUN each LUN maintains a queue of tasks initiator can link commands, so no intervening tasks i.e. atomic

Question 45

SCSI exceptions/errors

Answer 45

after an error, stop executing most commands prevents unwanted commands from executing simplifies device impl

Question 46

cost to transfer 1 sector?

Answer 46

max_rot_latency/sectors_per_track