Quiz 1 Flashcards

1
Q

Provides basic computing resources

A

Hardware

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

Defines the ways in which the system resources are used to solve the computing problems of the users

A

Application programs

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

A set of software frameworks that provide additional services to application developers

A

Middleware

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

A software-generated interrupt caused either by an error or a user request

A

Trap/exception

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

Request to the OS to allow user to wait for I/O completion

A

System call

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

Contains entry for each I/O device indicating its type, address, and state

A

Device-status table

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

Determines the logical interaction between the device and the computer

A

Disk controller

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

Copying information into faster storage system

A

Caching

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

Manages the execution of user programs to prevent errors and improper use of the computer

A

Control program

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

Understands the device controller and provides the rest of the operating system with a uniform interface to the device

A

Device driver

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

A wire that CPU hardware has that the CPU senses after executing every instruction

A

Interrupt-request line

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

Interrupt request line that is reserved for events such as unrecoverable memory errors

A

Nonmaskable interrupt

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

Interrupt request line that can be turned off by the CPU before the execution of critical instruction sequences that must not be interrupted

A

Maskable interrupt

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

Interrupt mechanism in which each element in the interrupt vector points to the head of a list of interrupt handlers

A

Interrupt chaining

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

Enables the CPU to defer the handling of low-priority interrupts without masking all interrupts and makes it possible for a high-priority interrupt to preempt the execution of a low-priority interrupt

A

Interrupt priority levels

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

Holds the addresses of the interrupt service routines for various devices

A

Interrupt vector

17
Q

How various hardware and software resources are shared.

A

Resource utilization

18
Q

“The one program running at all times.”

19
Q

Provides access between components and shared memory/communication among processors, main memory, and I/O modules

A

System bus

20
Q

Temporary storage location for frequently accessed data

21
Q

Storage that is infrequently written to and is nonvolatile

22
Q

Storage systems that are slow enough and large enough that they are used only for special purposes

A

Tertiary storage

23
Q

Provides a uniform interface between controller and kernel

A

Device driver

24
Q

Controls the operation of the computer and performs its data processing functions.

25
What is a processor referred to ask when there is only one?
Central processing unit (CPU)
26
Moves data between the computer and its external environment, which consists of a variety of devices, including secondary memory devices, communications equipment, and terminals
I/O modules
27
Determines which cache location a new block of data that is read into the cache will occupy
Mapping function
28
Chooses, within the constraints of the mapping function, which block to replace when a new block is to be loaded into the cache and the cache already has all slots filled with other blocks
Replacement algorithm
29
Enables programmer to minimize main memory references by optimizing register use
User-visible registers
30
Used by processors to control operating of the processor and used by privileged OS routines to control the execution of programs
Control and status registers
31
Register that specifies the address for the next read or write
Memory address register (MAR)
32
Register that contains data written into memory or receives data read from memory
Memory buffer register (MBR)
33
Bit set by processor hardware as a result of operations
Condition codes/flags