STRUCTURE AND FUNCTION OF THE PROCESSOR Flashcards
(26 cards)
1
Q
What are the disadvantages of using a multi-core processor?
A
- Some instructions may not be able to run in parallel
- An instruction may be dependent / waiting for other instructions to be completed
- Other factors influence professing speed (clock speed / cache / bottlenecks / etc)
- Program / OS needs to be written to specifically use multiple cores
2
Q
What is clock speed?
A
- The number of FDE cycles carried out per second by the processor
- Measured in Hz
3
Q
What is cache memory?
A
- Memory that contains frequently / recently used instructions / data
- Memory that has a faster Read / Write speed than RAM
- Memory that is close to / onboard the CPU
4
Q
Describe what is meant by ‘Von Neumann Architecture’
A
- Both data and instructions share the same memory unit
- Instructions and data stored in the same format
- A single set of buses / same bus for instructions and data (to connect CPU to memory and I/O)
- Follows fetch-execute cycle (can only fetch either data or instructions at one time)
- Has access to storage
- Has a (single) control unit
- Has an ALU
- Has ways to input and output
- (Special) registers within CPU
- Based on the stored program concept
5
Q
Describe what is meant by ‘Harvard Architecture’
A
- Uses separate memory unit for instructions and data
- Has separate buses for data and instructions
- Instructions and data can be accessed concurrently
- Has fixed memory sizes for data and instructions
- Instruction memory may be ROM (instructions would never be changed)
6
Q
Define the term ‘pipelining’
A
- Concurrent processing of multiple instructions / completing multiple FDE cycles at once
- One instruction can be fetched while previous is being decoded
- And the one before is being executed
- The output of one process is the input of the next
- In case of a branch pipeline is flushed
- More instructions can be carried out in a set amount of time
- Increasing the speed of program execution
7
Q
Describe how the accumulator is used during the Fetch-Decode-Execute cycle
A
- Temporary storage
- for data being processed / results of calculations (from the ALU) / data which has come from the MDR / RAM
- Checked for conditional branching
- Used as a buffer / gateway
- for I/O in processor
8
Q
Describe how the program counter is used during the Fetch-Decode-Execute cycle
A
- Holds the address of the next instruction to be executed
- Contents copied to the MAR at the start of FDE
- Incremented on every cycle
- Can be changed by branch / jump instructions
9
Q
What is meant by the term ‘register’
A
- Temporary storage / memory location
- inside the CPU
- Used for a single specific purpose
- Faster access speed than RAM / secondary storage
10
Q
Describe what happens during the ‘Fetch’ stage of the Fetch-Decode-Execute cycle
A
- The address stored in Program Counter is copied to the Memory Address Register
- Data in MAR is sent along the Address Bus
- The control unit sends a read signal along the control bus
- RAM copies the data from the location specified by the address bus and is sent along the data bus
- Data on the data bus is stored in the MDR
- Data is copied from the MDR to the CIR
- PC is incremented
11
Q
Define the term ‘multicore processor’
A
- More than one processing unit in a single processor
- Which can independently process instructions at the same time
12
Q
Describe the methods of improving computer performance
A
- Replace CPU with a faster CPU: A newer CPU may have a faster clock speed and so execute more instructions per second. It may have multiple cores and so be able to execute several programs simultaneously (or one in parallel). It may have more cache meaning comparatively slower RAM can be accessed less frequently.
- Add more / faster RAM: More RAM means more programs can be opened simultaneously without the need to use much slower virtual memory.
- Add a graphics card: Adding a graphics card will speed up the rendering of 3D graphics as GPU has specialist instructions and can apply the same instruction to multiple pieces of data simultaneously.
- Upgrade to faster secondary storage: The slower the secondary storage the longer it takes to load files / programs / data. A faster secondary storage device, such as flash memory can improve this.
- Update OS: OS makers often release updates and some of these will improve performance
- Install a lighter weight OS: Some lighter weight operating systems use fewer system resources allowing the system to devote more to running the user’s applications.
- Defragment the hard disk: A fragmented HDD runs slowly as time is spent finding parts of the files. This is reduced by defragmenting and storing the parts of the files contiguously.
- Check for viruses and spyware: Malware can slow down a computer. Removing it will improve performance.
13
Q
How is the current instruction register used during the fetch-decode-execute cycle
A
- MDR copies instruction to CIR
- CIR holds the instruction to be decoded
- into opcode and operand
14
Q
Describe one issue a branch may cause for a CPU using pipelining
A
- Branch could be followed by one of two possible instructions which one will only be determined at execution
- Meaning the wrong one may be fetched / decoded
15
Q
Describe the use of special registers during jump instructions, reading from and writing to memory
A
- Jump: CIR sends address to PC
- Reading and writing to memory: CU decodes and interprets instruction held in CIR. It then sends the address specified in the instruction to the MAR and the data to the MDR. All data to be saved uses the ACC
16
Q
Describe the role of the control unit in the processor
A
- Decodes instructions
- Sends control signals to coordinate movement of data through the processor / execution of instructions
- Controls buses
17
Q
Explain the need for the memory address register
A
- Contains the address of the instruction to be accessed in memory (address of instruction sent from PC)
- Contains the address of the data (to be accessed in or written to memory)
- Address of data sent from CIR
18
Q
Explain the need of the memory data register
A
- Contains the instruction which has been accessed from memory
- Contains the data which has been accessed from memory
- Instruction copied into CIR
- Acts as a buffer
19
Q
How does a fast clock speed improve processor performance?
A
- Gives more cycles per second
- More instructions can be executed per second
- So the program takes less time to run
20
Q
How does large cache memory improve processor performance?
A
- More space for data / instructions in cache memory
- RAM needs to be accessed less frequently
- Accessing cache is quicker than accessing the RAM
21
Q
Describe the role of the arithmetic logic unit in the processor
A
- Performs arithmetic and logical operations on data
- Arithmetic operations on fixed and floating point numbers
- Bitwise shift operations left and right
- Boolean logic operations
22
Q
Describe the control bus
A
Carries command and control signals to and from every other component of the CPU/computer
23
Q
Describe the data bus
A
Carries the binary 1s and 0s that make up the actual information being transmitted around the CPU/computer
24
Q
Describe the address bus
A
Carries memory addresses that identify where the data is being read from or written to
25
Describe the suitability of Harvard architecture
- Instructions would never be changed
- Removes need for secondary storage
26
Describe the advantages of Von Neumann and Harvard Architecture
Von Neumann:
- Cheaper to develop as the control unit is easier to design
- Programs can be optimised in size
Harvard:
- Quicker execution as data as instructions can be fetched in parallel
- Memories can be different sizes, which can make more efficient use of space
