Structure and Role of a Processor Flashcards
(28 cards)
Arithmetic Logic Unit
ALU performs arithmetic and logic operations
math operations plus AND, OR and XOR
Control Unit
responsible for controlling various components of the processor
controls fetch execute cycle
Registers
Small storage locations that hold data temporarily
have high read/write speeds
General Purpose registers
used as storage for any data that is required by instructions during execution
Special Purpose Registers
assigned to the storage of specific information
include Program counter, current instructions reigster, memory address register, memory buffer register and status register
Program Counter
holds the memory address of the next instruction to be executed in fetch/execute cycle
Current instruction register
holds the instruction that is currently being executed by the processor
Memory address register
stores the memory address of a memory location that is to be read from/written to
Memory buffer register
holds the contents of a memory location that has been read from or data that is to be stored
Status register
contains a number of bits the values of which can change to indicate the occurrence of an interrupt
Clock
Inside a computers processor is the system clock
generates a timing signal which changes at a regular frequency
synchronises communication between components of the processor
Fetch decode execute cycle
is a continuous cycle performed by the processor
contains 3 stages
Fetch (first stage)
the next instruction to execute is retrieved from main memory
content of PC is copied to the MAR
content of MAR is transferred to main mem of address bus
instruction is sent from main mem to MBR by data bus
PC is incremented by one
content of MBR is copied to the CIR
Decode (stage 2)
the content of the CIR is decoded by the control unit
decoded instruction is split into either opcode or operands
Execute
any data required by instruction that isnt present in registers is fetched
instruction is carried out
results of any calcs are stored in GP registers or main mem
Checking for interrupts
b/ween each fetch-execute stage of cycle, content of status register is checked for changes that could signify the occurrence of an interrupt
Opcode
type of operation that is to be carried out
e.g. addition/subtraction
Operands
are pieces of data on which operation is performed
Addressing modes
one bit in machine code is assigned to the addressing mode in use (immediate and direct)
Immediate addressing
value specified in operand is to be treated as actual value
Direct addressing
value specified by operand signifies a memory address
Factors affecting processor performance
number of cores
cache memory
clock speed
word length
address bus width
data bus width
Number of cores
directly affects performance of processor
each core can perform its own fetch-execute cycle independetly of others
so different applications can be allocated different cores
Cache memory
small portion of incredibly fast mem
read/write speads far higher than HDD and SSD
used to store frequently used info and reduces time fetching same info from main mem time