Structure and Role of a Processor Flashcards

(28 cards)

1
Q

Arithmetic Logic Unit

A

ALU performs arithmetic and logic operations
math operations plus AND, OR and XOR

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2
Q

Control Unit

A

responsible for controlling various components of the processor
controls fetch execute cycle

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3
Q

Registers

A

Small storage locations that hold data temporarily
have high read/write speeds

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4
Q

General Purpose registers

A

used as storage for any data that is required by instructions during execution

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5
Q

Special Purpose Registers

A

assigned to the storage of specific information
include Program counter, current instructions reigster, memory address register, memory buffer register and status register

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6
Q

Program Counter

A

holds the memory address of the next instruction to be executed in fetch/execute cycle

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7
Q

Current instruction register

A

holds the instruction that is currently being executed by the processor

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8
Q

Memory address register

A

stores the memory address of a memory location that is to be read from/written to

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9
Q

Memory buffer register

A

holds the contents of a memory location that has been read from or data that is to be stored

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10
Q

Status register

A

contains a number of bits the values of which can change to indicate the occurrence of an interrupt

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11
Q

Clock

A

Inside a computers processor is the system clock
generates a timing signal which changes at a regular frequency
synchronises communication between components of the processor

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12
Q

Fetch decode execute cycle

A

is a continuous cycle performed by the processor
contains 3 stages

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13
Q

Fetch (first stage)

A

the next instruction to execute is retrieved from main memory
content of PC is copied to the MAR
content of MAR is transferred to main mem of address bus
instruction is sent from main mem to MBR by data bus
PC is incremented by one
content of MBR is copied to the CIR

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14
Q

Decode (stage 2)

A

the content of the CIR is decoded by the control unit
decoded instruction is split into either opcode or operands

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15
Q

Execute

A

any data required by instruction that isnt present in registers is fetched
instruction is carried out
results of any calcs are stored in GP registers or main mem

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16
Q

Checking for interrupts

A

b/ween each fetch-execute stage of cycle, content of status register is checked for changes that could signify the occurrence of an interrupt

17
Q

Opcode

A

type of operation that is to be carried out
e.g. addition/subtraction

18
Q

Operands

A

are pieces of data on which operation is performed

19
Q

Addressing modes

A

one bit in machine code is assigned to the addressing mode in use (immediate and direct)

20
Q

Immediate addressing

A

value specified in operand is to be treated as actual value

21
Q

Direct addressing

A

value specified by operand signifies a memory address

22
Q

Factors affecting processor performance

A

number of cores
cache memory
clock speed
word length
address bus width
data bus width

23
Q

Number of cores

A

directly affects performance of processor
each core can perform its own fetch-execute cycle independetly of others
so different applications can be allocated different cores

24
Q

Cache memory

A

small portion of incredibly fast mem
read/write speads far higher than HDD and SSD
used to store frequently used info and reduces time fetching same info from main mem time

25
Clock speed
processors clock speed relates to frequency pulses generated by the system ^frequency = more cycles of fetch-execute cycle done - errors can occur when a computers clock is increased too far
26
Word Length
a word is a group of bits that is treated as a single unit by a processor can represent both instructions and data length of a word is the number of bits assigned to it higher word lengths allow for more bits to be transferred and manipulated as a single unit
27
address bus width
width of a bus relates to number of parallel wires that make up the bus increasing width of address bus increases range of addresses that it can specify - increases the computers amount of addressable memory
28
Data bus width
increasing width increases volume of data that can be transferred over the bus at any one time wider data bus allows processor to fetch more data from main mem in one cycle of fetch execute cycle reducing no. of cycles required to fetch large volumes of data