structure/function processor Flashcards
(29 cards)
ALU
arithmetic logic unit
performs the arithmetical and logical operations
CU
control unit
controls, manages, and directs operations inside the CPU with the FDE cycle
PC
program counter
holds the memory address of the next instruction to be executed
ACC
accumulator
temporarily stores the results of calculations from the ALU
MAR
memory address register
holds the memory address a location that is to be read to or written to
MDR
memory data register
temporarily stores data that has been read or needs to be written
CIR
current instruction register
holds the current instruction being executed
data bus
bi-directional bus that transfers data and instructions between components
address bus
used to transmit the memory addresses specifying where data is to be sent to or retrieved from
control bus
bi-directional bus that transmits control signals between internal and external components
control unit jobs
manages the flow of data between CPU and other devices
controls and coordinated the CPU activities
decodes instructions
what is a bus
set of parallel wires that connect components in the CPU together
what is the FDE cycle
sequence of operations that are completed to execute an instruction
FDE fetch
address from the PC is copied to the MAR
instruction held at that address is copied to the MDR by the data bus, PC is incremented by 1
value held in MDR is copied to the CIR
FDE decode
the contents of the CIR are split into operand and opcode
FDE execute
the opcode is executed on the operand
what factors affect the CPU performance?
clock speed, number of cores, cache size
what is clock speed?
the number of clock cycles completed in a second
how does clock speed affect CPU?
the higher the speed, the faster the processor can execute instructions
what is a core?
an independant processor that executes its own FDE cycle
how does number of cores affect CPU?
the more cores, the faster the performance
what is cache?
CPU’s onboard memory
instructions fetched from main memory are copied to cache to be accessed quicker
how does cache size affect CPU?
larger cache the more instructions can be stored to access quicker
less cache gets filled up quicker and instructions get replaced
what is Von Neumann architecture?
a computer architecture that has a single address space for both instructions and data
