Von Neumann Flashcards
(26 cards)
What is the von Neumann model and how many components does it have?
A fundamental model of a computer for processing computer programs.
5.
instruction
the smallest piece of work specified in a computer program
Address space
The total number of memory locations (“boxes”) available.
MAR
memory address register;
address of location to be accessed
sets up the decoder circuitry in the memory.
Addressability
he number of bytes of memory referenced by a given address.
MDR
memory data register;
where the contents of the MAR is placed into.
How to store a value in a memory location
First, write the address of the memory location in MAR, and the value to be stored in MDR. Then, go through the computer’s memory with the WE signal asserted. The information contained in the MDR will be written onto the memory location in MAR.
Processing unit
A unit in the vM model that does the instructions, specializing in one complex function.
What are the basic components of a processing unit?
ALU and General Purpose Registers (TEMP)
ALU
The Arithmetic and Logic Unit;
capable of performing basic arithmetic.
The ones for LC-3 include ADD, AND, NOT and Pass Through
What is the word length of the LC-3?
16 bits
Word length
Size of the quantities normally processed by the ALU
Which ISAs have their own word length, and what does it depend on?
All of them.
It depends on the intended use of the computer
What are the Registers (TEMP) used for on the Processing unit?
Fast “on-board” storage for a small number of words.
Close to the ALU allows for intermediate data storage while processing (much faster access than RAM).
Control unit
Keeps track of which instruction is being executed.
It fetches & decodes each instruction, and sets up the appropriate inputs for the Memory, Processing, and I/O.
PC
Program Counter, aka the Instruction Pointer;
Holds the address of the next instruction to be fetched.
IR
Instruction Register,
Holds the instruction currently being executed.
Steps of Fetch
PC -> MAR
PC -> PC + 1
Mem[MAR} -> MDR
MDR -> IR
Fetch
Read an instruction from memory.
Decode
Examines the instruction in order to figure out what the microarchitecture is being asked to do
Evaluate address
Computes the address of the memory location that is needed to process the instruction
Fetch operands
Obtains the source operands needed to process the instruction.
Operands can come from Registers or RAM, or be embedded in the instruction itself.
How is the Effective Address (EA) determined?
By the Evaluate address step;
computing the address of the operand (if any), or of the memory location to be accessed: e.g. the location from which to obtain a value.
Where do you store results?
Register or Memory
e.g.
LD.REG
MEM.EN/W
