128 Flashcards
(122 cards)
1
Q
Select which of the following are part of the compilation process:
A
Lexical Analysis, Syntax Analysis, Optimization, linking, code generation
2
Q
In the compilation process, the ______ performs program analysis and optimization.
A
Middle Stage
3
Q
Which of the follow best matches the definition for Syntax Analysis?
A
Performs syntax rules checking and constructs a symbol table and abstract syntax tree.
4
Q
Which of the follow best matches the definition for Lexical Analysis?
A
Separates the input source code text into tokens.
5
Q
Which of the follow best matches the function of the Middle Stage in the compilation process?
A
Performs program analysis and optimization.
6
Q
In the compilation process, the ______ separates the input source code text into tokens.
A
Lexical Analyzer (lexer)
7
Q
A computer consists of five major modules. What module do registers belong to?
A
Data Path
8
Q
The ______ of the CPU stores a small number of pieces of information, commonly the temporary results of calculations.
A
Registers
9
Q
Which of the following best matches the definition of the Bus?
A
Carries data between the ALU, registers, memory, and peripherals.
10
Q
The ______ of the CPU acts as an interface between the processor and the outside world, including long-term storage and user interfaces.
A
IO / Peripherals
11
Q
A computer consists of five major modules. What module does ALU belong to?
A
Data Path
12
Q
If two computers made by different companies have the same machine language, that means they have the same:
A
Architecture
13
Q
Which of the following best matches the definition of the Datapath?
A
Contains the ALU and Registers, and the interconnection between them.
14
Q
The ______ of the CPU carries data between the ALU, registers, memory, and peripherals.
A
Bus
15
Q
The ______ of the CPU contains the ALU and Registers, and the interconnection between them.
A
Datapath
16
Q
Which of the following best matches the definition of the Control Unit?
A
Coordinates the flow of information around the processor.
17
Q
The ______ of the CPU stores a small number of pieces of information, commonly the temporary results of calculations.
A
Registers
18
Q
Instruction cycle
A
fetch, decode, execute, store
19
Q
Decode Hardware
A
Data Memory, control unit
20
Q
Fetch Hardware
A
Instruction Memory, program counter
21
Q
Execute Hardware
A
ALU
22
Q
Store Hardware
A
Data Memory, program counter
23
Q
System Clock
A
Coordinates Activity, latches memory
24
Q
Select the hardware that is active during the Execute Stage of the instruction cycle:
A
ALU
25
Which of the following are stages in the instruction cycle?
Execute, decode, fetch, store
26
Which of the following are NOT stages in the instruction cycle?
Link, jump
27
A program consisting of 323 instructions is executing on a simple processor. Each instruction takes 4 cycles to complete, with a clock rate of 339 KHz. How long will it take to execute the program? Give your answer in units of milliseconds with at least 1 decimal place of precision.
3.8
28
Select the hardware that is active during the Store stage of the instruction cycle:
Data Memory, program counter
29
Select the hardware that is active during the Fetch Stage of the instruction cycle:
Program Counter, instructon memory
30
A program consisting of 946 instructions is executing on a simple processor. Each instruction takes 2 cycles to complete, with a clock rate of 6 MHz. How long will it take to execute the program? Give your answer in units of microseconds with at least 1 decimal place of precision
315.3
31
clock frequency
f = 1/T (1Hz = 1 cycle per second)
32
Speed
1 Program Execution / Time
33
X is n times faster than Y
SpeedX / SpeedY = n; TimeY/TimeX = n
34
Pareto Principle
80% of results generated by 20% of code
35
What design effort can improve the performance of a computer?
Decrease the clock cycles used by the program, Decrease the CPI
36
In comparing two computers, we execute a benchmark on each and measure the resulting speeds: Computer A: 733. Computer B: 979 How many times faster is Computer A than Computer B?
0.7
37
Which of the follow best matches this definition: The total number of instructions in a given program.
Instruction Count
38
Which of the follow best matches this definition: The duration of one clock cycle in seconds.
Clock Period
39
Which of the follow best matches this definition: The frequency of the clock signal, in cycles per second.
Clock Rate
40
In comparing two computers, we execute a benchmark on each and measure the resulting execution times:Computer A: 85, Computer B: 243. How many times faster is Computer B than Computer A?
0.3
41
the time taken for an electrical signal to travel through a wire or logic system
propagation delay
42
A designer chooses to use a cheaper polymer for packaging that decreases the transfer of heat to a heat sink. All else being constant, will the performance likely increase, decrease, or stay the same?
Decrease
43
Select the items below that a designer can modify to effect propagation delay (select all that apply).
Manufacturing Process, Processor Organization
44
A designer chooses to use a manufacturing process that decreases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same?
Increase
45
A designer chooses to use an organization that increases the logic depth of the processor. All else being constant, will the performance likely increase, decrease, or stay the same?
Decrease
46
A designer chooses to use an organization that decreases the logic depth of the processor. All else being constant, will the performance likely increase, decrease, or stay the same?
Increase
47
A designer chooses to use a manufacturing process that increases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same?
Decrease
48
How many symbols are used in the binary number system?
2
49
How many symbols are used in the decimal number system?
10
50
A binary "0" is represented by what physical phenomena in a modern computer?
Low Voltage
51
A binary "1" is represented by what physical phenomena in a modern computer?
High Voltage
52
What indicates a negative number in the two's complement representation?
The most significant bit is 1
53
A variable of type signed short stores a value of -32768, If the variable value is decremented what exception will occur?
Underflow.
54
A variable of type unsigned char stores a value of zero. If the variable value is decremented, what exception will occur?
Underflow.
55
A variable of type signed int stores a value of -2147483648, If the variable value is decremented what exception will occur?
Underflow.
56
A variable of type signed short stores a value of 32767. If the variable value is incremented what exception will occur?
Overflow.
57
Which of the following are causes of overflow?
Adding to a variable when its value is at the upper end of the datatype range.
58
A variable of type unsigned short stores a value of zero. If the variable value is decremented, what exception will occur?
Underflow.
59
A variable of type unsigned short stores a value of 32767. If the variable value is decremented, what exception will occur?
No exception.
60
A variable of type unsigned int stores a value of 4,294,967,295 If the variable value is decremented what exception will occur?
No exception.
61
Which of the following are causes of underflow?
Subtracting from a variable when its value is at the lower end of the datatype range.
62
A variable of type unsigned int stores a value of zero. If the variable value is decremented, what exception will occur?
Underflow.
63
In which of the following situations will endianness become an issue?
Transferring a memory block from a Little-Endian processor to a Big-Endian processor.Transferring a memory block from a Big-Endian processor to a Little-Endian processor.
64
Select the definition of big-endian
The most significant byte of a multi-byte datatype is stored at a lower address than the least significant byte.
65
Select the definition of little-endian.
The least significant bit of a single byte datatype is stored at a lower address than the most significant bit.
66
What register stores a return value of a procedure?
$v0
67
What register stores a temporary value that the caller procedure must save before calling a nested procedure?
$t0
68
What register stores a parameter value of a procedure?
$a0
69
What are the main reasons for writing procedures in assembly programs? Select all that apply.
Easier to reuse the code. Easier to understand and to debug
70
What register stores the return address of a procedure?
$ra
71
What register stores a temporary value that the callee procedure must save before performing it's task?
$s0
72
What register does the "jal" instruction automatically update?
$ra
73
In a procedure call, what is responsible for saving the $s0 - $s7 registers?
Callee Procedure
74
In a procedure call, what is responsible for saving the $t0 - $t9 registers?
Caller Procedure
75
In MIPS, the stack pointer is manipulated using the instruction addiu $sp, $sp, XX where "XX" is a number that may be positive or negative. If we need to reserve enough room on the stack for 8 integers in addition to the $ra register, what is the value of XX?
-36
76
A procedure does not call another procedure. How does it differ from a procedure that does call another procedure?
Register $ra does not need to be saved to stack
77
In a procedure call, the $a0-$a3 registers are used for what purpose?
Passing Parameters
78
A set of registers are reserved for procedure calls. How do we preserve all values when a procedure calls another procedure?
Use stack memory
79
When we write the instruction "addi $sp, $sp, -8", most likely we are preparing for:
Saving registers to stack
80
In a procedure call, the $ra register is used for what purpose?
Storing the return address
81
When we write the instruction "addi $sp, $sp, 8", most likely we are preparing for:
Executing instruction jr $ra
82
Given a pipelined processor with 3 stages, what is the theoretical maximum speedup of the the pipelined design over a corresponding single-cycle design?
3
83
Which of the following are true about single cycle vs. pipelined processor designs? (Select all that apply).
In a pipelined design, the processor components are fully utilized, but by different instructions. In a single cycle design, a single instruction is executing in the processor during any single clock cycle.
84
Pipelined processor designs increase performance, but at the cost of:
Increased processor design complexity.
85
Which of the following must be added to a single-cycle processor in order to implement a pipelined design? (Select all that apply)
Pipeline Registers, Modified Registers for simultaneous read/write. Hazard Detection & Mitigation Hardware
86
Pipeline registers store (select all that apply):
Control signals related to the instruction The results of pipeline stage execution. Instruction data necessary for the execution of later stages.
87
What is the maximum speedup (upper limit) of an N-stage pipelined processor?
N
88
Given a pipelined processor with 3 stages, what is the theoretical maximum speedup of the the pipelined design over a corresponding single-cycle design?
3
89
Where do we save the control signals for different instructions in a pipelined datapath?
In pipeline registers between the stages.
90
A load instruction can cause a stall, because:
The memory read operation takes too long
91
Forwarding (bypassing) alone can completely avoid stall (bubble) caused by: (select all that apply)
Arithmetic Instructions
92
What MIPS instruction will always cause a stall if the next instruction uses its result?
LW
93
What types of hazards does a pipelined processor need to deal with specifically? Select all that apply.
Structure Hazards, Control Hazards, Data hazards
94
What is an advantage of static branch prediction? (Select all that apply)
Simple implementation.
95
Which of the following describes 2-bit history table branch prediction?
A history table is used to store multiple bits, mapped to the branch instruction address, indicating the history of the branch behavior. A state machine is used to update the table.
96
What is a disadvantage of a dynamic branch prediction method, like history table?
Increases hardware complexity.
97
What is an advantage of a dynamic branch prediction method, like history table?
Increased performance. High branch prediction accuracy (better than chance)
98
Which of the following describes 1-bit history table branch prediction?
A history table is used to store a single bit mapped to the branch instruction address, indicating that the branch was previously taken or untaken.
99
Which of the following describes static branch prediction?
Hardware designer specifies to always predict a taken or untaken branch.
100
In the memory hierarchy design, what type of memory should be placed close to the CPU?
SRAM
101
Which of the following types of memory is the slowest?
Disk
102
Which of the following types of memory are generally used for the intermediate results of calculations?
SRAM
103
Large-scale, long term storage is typically implemented with what kind of memory technology?
Disk
104
You are designing an internet router that will need to save it's settings between reboots. Which type of memory should be used to save these settings?
Flash
105
Which of the following types of memory are volatile?
DRAM, SRAM
106
Which of the following types of memory is the most expensive?
SRAM
107
Caches are typically implemented with what kind of memory technology?
SRAM
108
Registers are typically implemented with what kind of memory technology?
SRAM
109
A level 1 cache is focused on supporting what kind of locality?
Temporal Locality
110
An element in an array is accessed in memory. The pre-loading of other data in that array is an example of what kind of locality?
Spatial Locality
111
The pre-loading of instructions into a cache that follow the instruction currently being executed is an example of what kind of locality?
Spatial Locality
112
The instructions that make up a loop that iterates more than once are kept in a cache. This is an example of what kind of locality?
Temporal Locality
113
In a multilevel cache system, the level-2 cache focuses on
Low miss rate
114
What types of locality are used in memory design? Select all that apply.
Spatial locality, temporal locality
115
A variable that has been accessed more than once is kept in cache. This is an example of what kind of locality?
Temporal Locality
116
A level 2 cache is focused on supporting what kind of locality?
Spatial Locality
117
Which of the following products are an example of the SIMD architecture?
Basic Graphics Processing Unit
118
What is the name for an architecture that executes one instruction on one set of data at a time?
SISD
119
What is the name for an architecture that executes several instructions, operating on different sets of data at a time?
MIMD
120
Which of the following products are an example of the MIMD architecture?
Intel Xeon Processor
121
Which of the following products are an example of the SISD architecture?
Intel Pentium Processor
122
Which of the following are reasons that CPU designers have adopted multiprocessing architectures?
Manage heat dissipation problems. Processing demand to solve complex problems
