3.7 organisation and architecture Flashcards
computer system
any device that can take a set of inputs and process them into useful outputs
(e.g. screen press (input) -> charas encoded (process) -> text displayed (output))
stored program concept
- instructions stored in main memory
- instructions are fetched and executed serially by the processor
- programs can be moved in/out of main memory
john von neumann architecture
- most common implementation of stored program concept, used in general purpose computing systems
- instructions + data share buses/addresses/memory
harvard architecture
- instructions + data have separate buses
- instructions + data stored in separate memories
- instructions + data can be fetched simultaneously
when is harvard architecture usually used
embedded systems like digital signal processing, where speed takes priority over complexities of design
parts of the cpu
- arithmetic logic unit
- control unit
- clock
- cache
- general-purpose registers
- dedicated registers
i/o controllers
act as interface between peripheral device and computer (cannot be directly connected to processor)
how do i/o controllers work
controller converts signals received from peripheral into processable format, vice versa
what does main memory do
stores data and instructions to be processed
word
- group of bits that is treated as single unit by processor
- can be used for representing both instructions + data
- usually 8, 16, 32, 64 bits
- each word has separate memory address
word length
the number of bits that are assigned to it
CPU
controls, calculates and executes instructions
arithmetic-logic unit
performs arithmetic, logical and shift operations on data
control unit
- coordinates activity of all other components
- each instruction accepted + decoded
- separate steps (fetching data address, fetching data itself) are identified
- each step synced with regular pulse from system clock
system clock
- series of regular on/off signals used to sync operations
- actions usually carried out on rising edge of clock
- actions each take fixed number of cycles to complete
factors affecting cpu performance
- number of cores (more processors = more instructions executed simultaneously)
- word length (amount of data that CPU can process simultaneously)
- address/data bus widths
- clock speed
- cache size
buses
- series of wires that transfer data signals between internal components
- typically consist of 8, 16, 32 or 64 lines
control bus
used to send control signals between
- each I/O controller and the processor
- as well as between the processor and memory
data bus
- sends data between components
- bi-directional
why data buses bidirectional
- when data/instructions needed, transferred from memory to processor
- after execution, data transferred back to memory
address bus
- carries address of a memory location from processor to I/O controllers + memory
- may carry address of next instruction to be processed, or data referred to in the instruction
- unidirectional
control bus - control signals
- memory read
- memory write
- bus request
- bus grant
- clock signal
memory read
causes data from addressed location to be placed on data bus
memory write
causes data on data bus to be written into addressed location