ADC & DAC Flashcards
(37 cards)
is the process by which analog signals are converted to their digitized forms.
ANALOG TO DIGITAL CONVERSION
ADC steps
- SAMPLING
- QUANTIZATION
- ENCODING
The analog signal is sampled at regular intervals of time
SAMPLING
The sampling rate must be at least twice the highest frequency of the signal
Nyquist Criterion
It is defined as the process of converting the continuous sample amplitude into a discrete amplitude.
QUANTIZATION
QUANTIZATION is defined as the process of converting the continuous sample amplitude into a discrete amplitude. Thus by then, the signal will be discrete in both: ____ and ____.
time and amplitude
The difference between the actual analog value and quantized digit value.
QUANTIZATION ERROR
It is the process which assigns ones and zeros (stream of bits) for every quantization level
ENCODING
The number of bits assigned for each level (n) in ENCODING depends on the levels’ number (L); such that ____
L=2^n
In an ideal analog-to-digital converter, the quantization error is uniformly distributed between ____ and ___.
–Δ/2 and Δ/2
The resolution of the ADC is the smallest detectable change in voltage.
IDEAL ADC
Q = Δ = ____ (i) = ____ (ii)
i. quantization step
ii. full scale/level’s number
TYPES OF ADCs
- Direct conversion ADC
- Successive approximation register (SAR) ADC
- Integrating ADCs: single slope, dual slop, and ramp ADC
- Sigma-Delta ADC (over sampled ADC)
- It is one of the most popular ADCs for 8-16 bits
- It has moderate conversion speeds. The conversion time is around 1µs.
- It doesn’t consume a lot of power and its cost is low in comparison with the other types.
- It requires a sample, hold circuit, and it can have missing output codes.
SAR ADC
A _______ works by using a digital to analog converter (DAC) and a comparator to perform a binary search to find the input voltage.
Successive Approximation ADC
A _____ is used to sample the analog input voltage and hold (e.g. keep a non-charging copy) the sampled value whilst the binary search is performed.
Sample and Hold circuit (S&H)
The _____ (i) starts with the most significant bit (MSB) and works towards the least significant bit (LSB). For an ________ (ii), 8 comparisons are needed in the binary search, taking a least 8 cycles.
i.binary search
ii. 8-bit output resolution
The sample and hold circuit samples the analog input on a rising edge of the sample signal. The comparator output is a _____ (i) if the sampled analog voltage is greater than the output of the DAC, ___ (ii) otherwise.
i. logic 1
ii. 0
Is the device which converts digital signals to analog ones.
DIGITAL TO ANALOG CONVERSION (DAC)
Most of DACs consist of a network of ____ (i) and _____.
i. resistors
ii. analog switches
DAC
The ______ control the currents or voltages that are derived from a particular reference voltage and provide analog output current.
switches
TYPES OF DACs
- Weighted resistor DAC
- R-2R DAC
- General purpose DAC (DAC 0800)
- Frequency to voltage converter
- Pulse width modulation
TYPES OF ADC ERRORS
- Offset Error
- Gain Error
- Nonlinearity Error
- Temperature-dependent Error
- Load-dependent Error
- Hysteresis Error
- Resolution Error
- Missing code Error
Constant component of the error that is independent of the inputs
OFFSET ERROR