Analog Flashcards
- What’s another name for “digital”?
2. What are two other names for “analog”?
- Binary
2. Linear, “small signal circuit”
What types of waves do digital and analog use?
Digital: square
Analog: sinusoidal, triangular, saw-tooth
Name five differences between digital and analog.
- Digital layouts are large, analog are small
- Digital requires more wires, metal layers
- Digital requires few passive devices
- Digital: small feature sizes and tight design rules to minimize chip size. Analog: for precision reasons, larger feature sizes and looser design rules.
- Digital: matching occasionally. Analog: matching very common and critical.
What does DAC and ADC stand for?
Digital to Analog Converter, Analog to Digital Converter
Why are analog circuits vulnerable to interference and process variations?
Much lower voltage or current levels. Matching often required, for instance differential pairs.
What three things must a matching circuit tolerate?
- Variations in process parameters.
- Variations in operating temperature.
- Variations in operating conditions such as supply voltage difference and voltage and current drifts due to interference.
What are 7 common layout techniques to allow an analog circuit to tolerate variations?
- Layout matching devices in the same orientation and close to each other.
- Layout matching devices in the same style (number of contacts, size of diffusions, etc.
- May require exact same input order as schematic even in “AND” configurations.
- Add dummies to eliminate the “edge effect” or “proximity effect”.
- Keep matching devices away from nwell edge to reduce Well Proximity Effect (WPE).
- Keep matching devices away from Trench Isolation Edges.
- Use inter-digitating technique.
Why layout matching devices in the same orientation and close to each other?
Minimizes deviations both in the distribution of dopants and the etching of materials among matching devices.
Why layout matching devices in the same style?
Minimizes parasitic R and C among matching devices.
Why should the input order match the schematic in many analog circuits?
Failing to do so will make the circuit performance less predictable because of variations in series resistance due to transistor’s body effect.
What is another name for the “edge effect”?
“Proximity effect”.
What is the edge effect and its solution?
Result of differing dopant concentrations and etching consistence on the devices along the perimeter of a large group of similar devices. Will result in a mismatch between inner and outer devices. Solution: dummies
What does WPE stand for?
Well Proximity Effect
What is the well proximity effect?
Dopant concentration is higher along the nwell edge because at the time of bombardment the photoresist along the edges of a well deflects some dopant ions.
What differences does the well proximity effect cause?
Threshold (Vt) and Ids, every kind of MOS.
Also carrier mobility, transistor gain, Leff and R.
What does STI stand for?
Shallow Trench Isolation
What is STI?
Trenches of SiO2 or Si3N4 surrounding devices.
What problems does STI cause?
Proximity and Compressive Stress issues. Because of difference in lattice spacing between silicon regions (nwell or psub), STI induces stress. First order effect is to alter band structure, which changes effective mass of mobile electrons or holes, altering mobility. Also effects saturation velocity. Affects spacing of atoms in lattice, causes changes in final doping profiles in the body after annealing. Threshold voltage and body effect coefficient can therefore be indirectly altered.
What does interdigitating do?
Offsets both dopant concentration variation and temperature gradient across the die surface by exposing both devices in an identical manner.
When do you need to do wire matching? How do you do it?
When two or more interconnects require their parasitics to be matched. Use similar layers with similar lengths to form matching connections.
Describe 4 different P&G mixed signal routing plans, from worst to best.
- Shared VDD and VSS bond pad, single tributary (rail) feeding all circuits.
- Shared VDD and VSS bond pad, separate rails for analog and digital
- Separate bond pads for avdd and avss.
- Separate avdd and avss bond pads, and separate rails for nwell and psub vs. transistors and devices.
What is “crosstalk”?
Any unwanted interference from one conductor (or layer) to another. Between two conductors there exists mutual capacitance (Cm) and Inductance (Lm) which give rise to feedthrough (or coupling).
What is the equation describing how propagating voltage couples (induces) current on a neighboring conductor?
Delta i = Cm * dv / dt, where delta i == coupled current, Cm is mutual capacitance between conductors, dv / dt == voltage change on source with respect to time.
What is the equation describing how current induces voltage on a neighboring conductor?
Delta v = Lm * di / dt, where delta v = induced voltage, Lm is mutual inductance between conductors, di / dt == current change on source with respect to time.
