C+I Flashcards
(187 cards)
1
Q
What is a file?
A
A file is a named collection of related information that is
recorded on secondary storage.
2
Q
Attributes of a file (metadata)
A
Name of file identifier (chosen by system) location on storage device Size of file Protection mode of file (permissions) Create, access, modify times
3
Q
Four file operations
A
CRUD Create Read Update Delete
4
Q
Which of the for file operations isn’t technically required? Why?
A
Update
While inefficient, one could create a new, updated file for each edit and delete the old file
5
Q
Directory
A
Storage of files (folder)
file organisation
6
Q
File mounting
A
File system on a storage device may be mounted at a point in the existing file system
7
Q
2 distinctive features of Linux file system
A
∙ an everything is a file approach;
∙ a tree-like file structure;
8
Q
Everything is a file
A
All these things are classed as files ∙ regular files: sequences of bytes; ∙ directories: name/inode association lists; ∙ special files: peripheral devices; ∙ pipes: buffers between processes; ∙ links: locations of other files; ∙ symbolic links: names of other files.
9
Q
Tree like file structure
A
Diagram with the BLK and 12 /256 stuff
10
Q
Magnetic Disks - Organisation
A
Disk has a number of spring platters, over which hover some heads attached to a movable arm.
Platter divided into circular tracks, which are divided into sectors.
Tracks at one arm position make up a cylinder
11
Q
Magnetic Disks - Operation
A
A magnetic disk is read/written by moving the arm to the required cylinder and using a head to sense/change the magnetism of a sector.
12
Q
Solid-State Disks - Organisation
A
A solid-state disk has a controller, some buffer memory, and some flash memory.
Typically like 256Kb buffer memory, 128Mb flash memory with 4Kb pages and 256Kb block size, and ARM controller
13
Q
Solid-State Disks - Reading
A
Copy a flash memory page to the buffer
Read data from page in buffer
14
Q
Solid-State Disks - Writing
A
Copy a memory block into the buffer
Erase the block in the flash memory
Modify the block in the buffer
Write the block from the buffer to the flash memory.
15
Q
Wear levelling (increase SSD lifetime)
A
Dynamic - writes new data to the least-recently-used block, cold data is not moved
Static - additionally periodically moves existing data to the least-recently used block, cold data is moved
16
Q
3 categories of I/O devices
A
∙ human interface devices - e.g. screens or keyboards;
∙ storage devices - e.g. disks or tapes;
∙ transmission devices - e.g. network cards or modems.
17
Q
Busses
A
An I/O device may be connected via a port (rare) or a bus (common).
e.g. Graphics, Bridge, Disk and Network controllers attached to the PCI bus
18
Q
Controller registers of I/O devices
A
∙ the data-in register — data coming from device;
∙ the data-out register — data going to device;
∙ the status register — bits indicating status of device;
∙ the control register — bits giving commands to device.
19
Q
Instructions used to access controller register
A
Standard memory instructions (common), or special instruction (rare)
20
Q
2 approaches to I/O control
A
1) polling
2) interrupts
21
Q
I/O control - polling
A
The processor checks the device to see if it is ready
“How you doing? How you doing? How you doing?”
WORSE
22
Q
I/O control - interrupts
A
The device signals the processor when it is ready
BETTER
23
Q
When is Direct Memory Access used?
A
When devices need to deal with large volumes of data
24
Q
4 separate I/O system calls
A
1 character I/O
2 block I/O
3 memory-mapped I/O
4 network I/O
25
Character I/O system call
Enable an application to get/put a single character from/to a device.
26
Block I/O system call
Enable an application to read/write many characters, and perhaps to seek on a device
27
Memory-Mapped I/O system call
Enable an application to
| map a device into memory
28
Network I/O system call
Enable an application to
| read/write many characters to/from a network device socket
29
A computer system organised into processes may achieve what 2 things?
∙ modularity — easier to build and maintain
| ∙ speedup — easier to run on multiple machines
30
Lifecycle of a process
born -> ready running ->exit
31
What does the process controll block contain?
```
∙ the process number (identity);
∙ the process state (registers);
∙ the process address space ( memory);
∙ the process I/O (open files and network connections);
∙ ...
D
```
32
Context switching
A context switch involves saving the machine state in one process control block and loading the machine state from another.
33
Process Address Spaces have: (4 things)
∙ a stack section for temporary data;
∙ a heap section for dynamically-allocated data;
∙ a data section for global data;
∙ a text section for program code
34
What are the 4 Unix system calls to spawn a process?
∙ fork: copies a process address space;
∙ exec: overwrites a process address space with a program;
∙ wait: waits for another process to exit;
∙ exit: terminates a process.
35
Inter-process communication may be either:
1) shared memory;
| 2) message passing.
36
Inter-process communication - shared memory
Processes write data to/read data from from an agreed area of memory.
37
Inter-process communication - message passing
Processes send messages to/receive messages from an agreed mailbox
38
3 memory management tasks
1) relocation;
2) protection;
3) sharing.
39
Memory management - relocation
Relocating the memory of each process
40
Memory management - protection
Protecting the memory of each process
41
Memory management - sharing
(Controlled) sharing of the memory of each process
42
6 memory management techniques
1) fixed partitioning;
2) dynamic partitioning;
3) simple segmentation;
4) virtual memory segmentation;
5) simple paging;
6) virtual memory paging.
43
Memory management - Fixed Partitioning
Loads entire process memory maps into same-sized partitions
44
Memory management - Dynamic Partitioning
Loads entire process
| memory maps into different-sized partitions. (e.g. big, medium, and small partitions)
45
Memory management - Simple Segmentation
Loads all process memory map segments into different-sized partitions.
-- Also helps with memory protection
46
Memory management - Virtual memory segmentation
Loads some process memory map segments into different-sized partitions.
(Some stay in virtual memory)
47
Memory management - Simple paging
Divides process memory maps into same-sized pages and loads them all into same sized frames.
48
Memory management - Virtual memory paging
Divides process memory maps into same size pages and loads some of them into same sized frame. (Some stay in virtual memory)
Ensures memory sharing BY ...
49
3 main components of a computer
1) the central processing unit (CPU)
2) the memory
3) the input/output devices
50
General-purpose registers
CPU contains small number of registers (r0-r15), most of which are general purpose (used for whatever is required)
51
Special-purpose registers
Of r0-r15, r13,r14, and r15 are special purpose. They perform specific roles such as program counter (r15) and stack pointer (r13)
52
Arithmetic logic unit (ALU)
```
Performs operations between two input registers, putting the result in an output register.
e.g.
mov r3, #7 @ set r3 to 7
mov r9, #6 @ set r9 to 6
mul r8, r3, r9 @ set r8 to r3 * r9
```
53
Bits, Bytes, and Words
∙ a binary digit (bit) is 0 or 1;
∙ a binary term (byte) is 8 bits;
∙ a word may be 2, 4, or 8 bytes.
54
What does the memory store
Programs and data
55
Load instruction
Transfers a word from memory to a register
| e.g. ldr r1, [r8]
56
Store instruction
Transfers a word from a register to memory
| e.g. str r3, [r6]
57
Commonly used bases
Decimal - base 10
Binary - base 2
Hexadecimal - base 16
Octal - base 8
58
Control unit
Fetches instructions from memory, as determined by the program counter register
59
The stack
Push instructions to add a value to top, pop to take off top value. LIFO/FILO ) first in last out) (opposite of queue).
60
I/O devices are connected by busses that have 3 difference lines. What are they?
∙ control lines that carry commands; (control bus)
∙ address lines that carry addresses; (address bus)
∙ data lines that carry data. (data bus)
61
Metaphor for why cache memory is needed
To cook, you require ingredients. But if you cook a meal it would be inefficient to fetch each required ingredient from a supermarket every time it is needed.
The solution is to use a fridge to store commonly used ingredients for easy access.
Computation is possible by fetching all instructions and data from the memory when required, but using a smaller, closer cache memory ans a bus connecting it to the CPU is far more efficient.
62
Temporal locality
Programs exhibit temporal locality (locality in time) — if an item in memory is referenced, then it is likely to be referenced again soon.
Hence it can be stored in cache.
63
Spacial locality
Programs exhibit spatial locality (locality in space) — if an item in memory is referenced, then it is likely that those nearby will be referenced soon.
Hence, nearby items are stored in cache.
64
Cache hit or miss
∙ a cache hit — read data from cache;
| ∙ a cache miss — read data from memory into cache first.
65
Three common cache designs
1) direct-mapped;
2) fully-associative;
3) set-associative
66
Direct-mapped cache
In a direct-mapped cache, a memory address is mapped to exactly one cache address.
-> Can waste space/ could already be something mapped to that spot
67
Fully-Associative Cache
In a fully-associative cache, a memory address is mapped to the least-recently-used cache address
-> More efficient but slower - have to search cache
68
Set-Associative Cache
In a set-associative cache, a memory address is mapped to exactly one cache set, and to the least-recently-used place in that set.
-> Most efficient. All modern computers use this
69
Relationship Between Caches
A fully-associative cache with 𝑆 slots is an 𝑆-way associative cache — there is 1 set of size 𝑠.
A direct-mapped cache with 𝑆 slots is a 1-way set-associative cache — there are 𝑆 sets of size 1.
DON'T REALLY GET THIS
70
Dealing with write hits (2 options)
∙ write back — write into cache only;
| ∙ write through — write into both cache and memory.
71
Dealing with write misses (2 options)
∙ write around — write into memory only;
| ∙ write allocate — write into memory and read into cache.
72
Virtual memory
Memory stored externally, such as disk. Extends the idea of a cache memory to disk.
73
Pages
```
Virtual memory (disk) is divided into pages, and addresses are seen as (virtual-page-number, offset) pairs.
VIRTUAL MEMORY frames
```
74
Frames
Physical memory (RAM) is divided into frames, and addresses
are seen as (physical-frame-number, offset) pairs.
PHYSICAL MEMORY pages
75
Page tables
A per-process page table maps virtual-page-numbers to either physical-frame-numbers, or to swap-space on disk.
76
Inter-Process Protection
A supervisor mode provides inter-process protection from addressing errors by others
77
Intra-Process Protection
Virtual page protection bits provide intra-process protection from addressing errors by self.
78
Pipelining - concept
Imagine making cars one at a time, going through each stage for each car. It would be slow and inefficient.
A much faster method is to work on many cars at once, working on one stage of one car while the next car goes through the stage before.
The rate of car production is multiplied by the number of stages, and this concept is known as pipelining.
79
Fetch-Decode-Execute Cycle
1) Fetch — read an instruction from memory;
2) Decode — identify the instruction;
3) Execute — carry out the instruction.
Pipelining can be used with the fetch-decode-execute cycle to increase efficiency.
80
Pipelining - What are control hazards?
A control hazard occurs when a branch instruction changes the next instruction, messing up the pipeline.
81
Pipelining - Dealing with control hazards (4 ways)
∙ stall the pipeline;
∙ assume branch not taken;
∙ branch prediction;
∙ branch delay slots.
82
Stall the pipeline
The processor may stall the pipeline, by squashing instructions.
83
Assume Branch Not Taken
The processor may assume branch not taken, squashing
| instructions if wrong.
84
Branch Prediction
The processor may try branch prediction (guessing result) based on past
branches, squashing instructions if wrong.
85
Branch Delay Slots
The processor may demand branch delay slots after a branch.
86
Pipelining - What are data hazards?
A data hazard occurs when one instruction immediately uses the result of another. Can be impossible in some pipeline systems.
87
Spectre (Speculative execution)
Branch prediction can mean a line of code is evaluated when it shouldn't be due to a false prediction.
if x < array1_size:
y = array2[ array1[ x ] ]
X is actually not less than array_size, but if the prediction is wrong, y will be temporarily changed.
88
Attack using spectre
'array2' is unknown, private information, but by searching and checking access times, the values which have been accessed speculatively can be found, since they are read from the cache and so are accessed faster.
89
Meltdown
There is a similar effect with memory stored using virtual memory paging.
Here it is called meltdown since it melts security boundaries normally enforced by the hardware
90
4 types of computers as classified by Flynn
SISD - Single Instruction, Single Data
MISD - Multiple Instruction, Single Data
SISM -Single Instruction, Multiple Data
MIMD - Multiple Instruction, Multiple Data
91
Single Instruction, Single Data
Computer has a single instruction stream working on a single data stream.
92
Multiple Instruction, Single Data
Computer has multiple instruction streams working on a single data stream.
e.g. majority vote system (triple modular redundancy)
93
Single Instruction, Multiple Data
Computer has a single instruction stream working on multiple data streams.
e.g GPUs (multi-threading) - A multiprocessor runs a thread until blocked by a memory access, when it switches to another ready thread.
94
Multiple Instruction, Multiple Data
Computer has
| multiple instruction streams working on multiple data streams.
95
Multicores
A multicore puts many CPU cores on a chip
| e.g. - AMD EPYC 7601 Processor
96
Multiprocessors
A multiprocessor puts two or more chips on a board.
| e.g. - Dell R7425 Blade Server
97
Multicomputers
A multicomputer puts two or more multiprocessors in a rack.
| A standard rack mount can be used to hold multiple blade servers.
98
Energy demand
Energy demand for computing my rise to 8% of total electricity use in the best case, or 21% in the worst by 2013, calling for a requirement for more energy efficient computing.
99
Energy-Efficient Operation
The challenge of energy-efficient operation is to achieve computation rates subject to power dissipation constraints.
100
Advanced Configuration and Power Interface (ACPI)
∙ defines per-system power states S0-S6;
∙ defines per-device power states D0-D3;
∙ defines per-device performance states P0-P15.
The S0, D0 and P0 states have normal power consumption; 0others have successively lower power consumption
101
How could a fan or CPU save power?
Only spin when the device temperature is recorded to be above a certain level, and only spin at a necessary speed.
CPU saves power by shutting off idle cores and lowering clock speed.
102
Zombie servers
On-premises data centres may have up to 25% unused
| “zombie” servers that no one dare retire since they don't know if its actually important for something.
103
Power Usage Efficiency (PUE)
| of traditional cloud data centres
Traditional cloud data centres using off-the-shelf components have a Power Usage Efficiency (PUE) of 2.0, far from a perfect 1.0
104
Power Usage Efficiency (PUE)
| of Hyperscale Cloud Data Centres
Hyperscale cloud data centres using Open Compute Project components have a Power Usage Efficiency (PUE) of 1.2, close to a perfect 1.0.
One Open Compute Project server replaces 3.75 traditional ones.
105
3 ways to lower power usage efficiency rating (make more efficient)
1 bespoke hardware;
2 smarter cooling;
3 mobile computing.
106
Bespoke Hardware
Remove unnecessary parts of computers with bespoke hardware, stripping out video cards, USB connectors, blue lights, fixing screws, . . .
107
Smarter Cooling
Another way to lower the power usage efficiency number is by smarter cooling, by location or by technology.
A facebook data centre is in a cold environment and uses a big fan to suck in cold air from outside to cool the data centre
108
Mobile Computing
Another way to lower the power usage efficiency number is by letting mobile computing take on the work of larger devices (but worry about Netflix and high-definition camera phones).
109
Host
A computer connected to a computer network
110
LAN - local area network
A switching device (switch/router) to which hosts are connected
111
WAN - wide area network
Connected switching
| devices, to which local area networks are directly connected
112
4 Connection technologies
1 twisted-pair cables - four pairs of copper wires twisted together in a shielded cable
2 fibre-optic cables - bundle of light-conducting fibres in a shielded cable
3 terrestrial radio channels - links two-or-more mobile stations via a base station (Hawaii)
4 satellite radio channels - l links two-or-more ground stations via a geostationary satellite
113
2 switching devices
1 switches
| 2 routers
114
Switch
MAC address to port mapping.
Hardware device for interconnecting hosts
(using the same packet (or segment) format.)
115
Routers
Forwarding tables which contain a valid next hop route for each possible destination address.
Hardware device for interconnecting networks
(that may use different technologies, addressing schemes or packet formats)
116
The 5 protocol layers
```
Application
Transport
Internet
Network
Physical
```
117
Application layer - 2 protocols
1 client-server protocols;
| 2 peer-to-protocols
118
Client-server protocols
In a client-server protocol, a client sends a request to a
server and receives a response back from it.
e.g. HTTP (Hypertext Transfer Protocol)
119
HTTP request consists of...
∙ the request line
∙ the request headers
∙ the request body
120
HTTP request - request line
```
method, resource, version (GET /images/logo.png HTTP/1.1)
mainly:
GET - receive data
HEAD - receive headers of data
DELETE - delete data
...
```
121
HTTP request - request headers
```
The request headers consist of (name, value) pairs on separate lines:
Content-Length : 324
mainly:
Host - domain name of server
Date - date sent
User-Agent - name of client
```
122
HTTP request - request body
The request body is empty for all but POST requests.
123
HTTP response consists of...
∙ the status line - version, code, reason
∙ the response headers - name : value
∙ the response body - HTML text e.g.
Hello World!
124
Peer-to-peer Protocols
In a peer-to-peer protocol, one peer sends a request to
| another, and receives a response back from it
125
Transport layer - 2 protocols
1) the Transmission Control Protocol (TCP);
| 2) the User Datagram Protocol (UDP)
126
Most important fields of the TCP header are...
The most important fields of the TCP header are the source port and destination port
127
7 TCP services
∙ connection-oriented communication - an application sets up a connection, uses it, and tears it down
∙ end-to-end communication - a connection has exactly two endpoints
∙ complete reliability - data will be received exactly as sent, even if than means re-sending
∙ full duplex communication - data may be
sent and received simultaneously
∙ a stream interface - a continuous stream
of data is sent and received
∙ reliable connection startup - three-way handshake
∙ graceful connection shutdown - four-way handshake
128
Most important fields of the UDP header are...
The most important fields of the UDP header are the source port and destination port
129
4 UDP services
∙ connectionless communication - an
application does not set up or tear down a connection
∙ end-to-end communication - connection has exactly 2 endpoints
∙ best-effort reliability - data may be lost, duplicated, or delayed
∙ a message interface - individual data items are sent and received.
130
When to use TCP or UDP
UDP better when low latency (high speed) is more important that reliability/accuracy
e.g. video call/ network gaming
NOT file transfer
131
Internet layer - 4 protocols
1) addressing
2 forwarding;
3 routing;
4 reporting.
132
Addressing
The Internet Protocol (IP) gives every host and router network interface an address.
An IP address is divided into network / host
Certain IP addresses are private and so may not be used on the public internet.
(10.x.x.x,172.16.x.x,192.168.x.x)
133
Forwarding
An IP router forwards packets on the appropriate interface
according to their addresses, and stores a forwarding table which gives an interface
for each possible destination address.
An IP router uses longest prefix address matching, and benefits from addresses being assigned in hierarchical fashion
134
Routing
An IP router periodically exchanges forwarding tables with its
neighbours, and then recomputes its own
135
Reporting
The Internet Control Messaging Protocol (ICMP) allows hosts and routers to communicate (often error) information to each other
136
Network communications work well/badly if...
A network communication works badly if two or more computers send messages at once, but well if one computer sends a message at a time
137
There are two sorts of multiple access protocols
1) Carrier Sense, Multiple Access/Collision Detection
(CSMA/CD), for wired networks, such as Ethernet;
2) Carrier Sense, Multiple Access/Collision Avoidance
(CSMA/CA), for wireless networks, such as WiFi
138
CSMA/CD
Wired network
∙ all computers are attached to a shared cable — Multiple Access (MA);
∙ any computer may transmit if the cable is unused — Carrier Sense (CS).
∙ a computer may detect that what it is transmitting is not what it is receiving — Collision Detection (CD);
∙ a computer waits for a random interval (chosen from an exponentially-doubling range) after detecting a collision, and tries again.
139
Switches
A switch builds a mapping from MAC addresses to ports, and uses it to forward packets
140
CSMA/CA
Wireless network
∙ all computers use a shared frequency — Multiple Access
(MA);
∙ any computer may transmit if the frequency is clear — Carrier Sense (CS).
∙ a computer finding the frequency clear, transmits after an instant;
∙ a computer finding the frequency busy counts down from a random value while the channel is clear; otherwise, the
count is frozen — Collision Avoidance (CA);
∙ a computer then transmits and (hopefully) receives an acknowledgement.
141
Hidden station problem + solution
A computer may be in range of the base station, but out of range of another computer — the hidden station problem.
The hidden station problem may be solved by reservation
using ready to send and clear to send.
142
Spread Spectrum Transmission
Wireless networks use spread spectrum transmission (multiple frequencies) increasing immunity to noise.
143
What is the Domain Name System (DNS)?
The main function of DNS is to translate domain names into IP Addresses, which computers can understand.
This way you can write www.amazon.com instead of a 12 digit IP address.
144
The DNS must be... (4 things)
1) scalable - cope with all hosts (there are a lot!)
2) efficient - must not delay any host (don't want to wait for page name to translate before loading)
3) reliable - it must not be a single point of failure
4) maintainable - it is constantly updated
145
Achieving Scalability
The DNS achieves scalability by organising a large number of servers in a hierarchical fashion.
Root → .com, .org, .uk,... → (google.com, intel.com), (wikipedia.org), (gov.uk, ac.uk)
146
Root Servers
There are thirteen root servers at the top of hierarchy, spread around the world
147
Top-Level Domain Servers
There are many top-level domain servers for “.com”, “.org”, “.uk”, “.biz” . . .
148
Authoritative Servers
There is an authoritative server for every organisation with a publically-accessible Web or mail server.
149
Achieving Efficiency
The DNS achieves efficiency by local server caching - for exeter uni server, if someone else has had facebook open recently, the url is cached so it will open quicker for you.
150
Achieving Reliability
There are thirteen Root Servers, [A..M], distributed throughout
the world to remove single point of possible failure
151
Achieving Maintainability
Authoritative domain servers can be registered, updated and
| deregistered automatically. 'exeter' is registered to ac.uk
152
Betrayal by a Trusted Server
A trusted DNS server may not be so trustworthy! It may
| promote some policy or business relationship - return the wrong webpage!
153
DNSSEC
The Domain Name System Security Extensions (DNSSEC) adds security to DNS — responses are authenticated, but not encrypted
154
Digital Signatures
A sender signs a message by attaching its hash, encrypted with their private key.
155
Problem with IPv4
IPv4 addresses are four bytes long, but the number of pissible registered addresses is running out. The internet of things (IoT) is also adding more devices to the network.
156
Network Address Translation (NAT)
A NAT box maps many
| “inside” (private) addresses to a single “outside” (public) address, using port numbers to resolve ambiguity — a kludge.
157
Why do we need IPv6 when we have IPv4? Steps forward
IPv6 has
1) larger address space
2) built-in security
3) jumbograms.
158
IPv6 - larger address space
4 bytes (v4) to 8 16-bit words gives more addresses than we will ever need
159
IPv6 - built-in security
Every IPv6 packet has a fixed header, some optional headers and a payload.
An optional authentication header has:
1) a Security Parameters Index (SPI) for encryption;
2) some Authentication Data for signing.
160
IPv6 - jumbograms
An IPv6 jumbogram allows packets larger than 2^16 bytes, up to 2^32 bytes.
161
Basic description of a firewall
A single fortified point of
| entry/exit in a network
162
4 types of firewall
1) packet-filtering firewalls;
2) stateful packet inspection firewalls;
3) application-level gateways;
4) circuit-level gateways.
163
Packet-filtering firewalls
A packet-filtering firewall filters individual packets on the basis of packet headers and packet payloads.
164
Shallow/Deep Packet Inspection
A shallow packet inspection examines packet headers, where a deep packet inspection examines packet payloads.
165
Stateful Packet Inspection
| Firewalls
A stateful packet inspection firewall filters incoming individual packets on the basis of a directory of established outgoing TCP connections.
166
Application-Level Gateways
An application-level gateway operates at the application level, working on application headers or content.
e.g. a Web or email gateway
167
Circuit-Level Gateways
A circuit-level gateway sets up two TCP connections: one
| from inside to the firewall, and one from firewall to the outside, if allowed
168
Firewall organisations include... (2 things)
1) single bastion/firewall inline;
| 2) double bastion/firewall inline
169
Single Firewall Inline
A single firewall inline puts a firewall (or bastion) between
an external and internal router.
170
Double Firewall Inline
A double firewall inline puts a Demilitarised Zone (DMZ)
| between an external and internal firewall (or bastion).
171
The Demilitarised Zone (DMZ)
The Demilitarised Zone (DMZ) is a network for systems that must be externally accessible, but still need some protection.
e.g. Web, email, DNS servers
172
Linux Firewalls
A Linux firewall processes packets at five hook points
173
A firewall program consists of... (3 things)
∙ tables, which are arrays of chains;
∙ chains, which are lists of rules;
∙ rules, which are lists of patterns, with actions.
174
5 main services provided by the operating system
```
∙ file management;
∙ input/output management;
∙ process management;
∙ memory management;
∙ multiprocessor management.
```
175
User Mode and Kernel Mode
System calls involve a constant switch from user mode (plain instructions) to kernel mode (plus privileged instructions)
176
4 operating system kernel structures
1 monolithic;
2 layered;
3 microkernel;
4 modules.
177
Monolithic Structure
An operating system with a monolithic structure has all
services implemented by a large kernel.
Examples: CP/M, MS-DOS
178
Layered Structure
An operating system with a layered structure has services
implemented by a large kernel, with a layered organisation.
Examples: UNIX, VMS
179
Microkernel Structure
An operating system with a microkernel structure has
| services implemented by servers, and a small kernel delivering messages between them. Examples: Mach, QNX
180
Modular Structure
An operating system with a modular structure has services implemented by modules, and a small kernel that loads them
on demand. Examples: Linux, OS X
181
Bootstrapping
Many computer systems bootstrap the operating system:
1) the stage one boot loader is run from BIOS ROM;
2) the stage two boot loader is loaded from disk and run;
3) the operating system proper is loaded from disk and run.
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Virtual Machines
A virtual machine abstracts a physical computer into a virtual one.
Examples: VMware, VirtualBox.
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4 most common scheduling algorithms
1 first come first served;
2 round robin;
3 shortest process next;
4 multilevel queuing.
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First come first served;
Based on creation time - queue
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Round Robin
The round robin scheduling algorithm shares the processor on the basis of equality. Same time for each process
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Shortest Process Next
The shortest process next scheduling algorithm shares the processor on the basis of shortest predicted execution time.
- Prediction can be WRONG!
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Multilevel Queuing
The multilevel queuing scheduling algorithm shares the processor on the basis of execution history.
