CH3 Review Questions

Question 1

The mnemonic BRNE stands for ________.

Answer 1

Branch if not equal

Question 2

True or False.

“BRNE BACK” makes its decision based on the last instruction affecting the Z flag.

Answer 2

True

Question 3

“BRNE HERE” is a ____-byte instruction.

Answer 3

2

Question 4

In “BREQ NEXT”, which register’s content is checked to see if it is zero?

Answer 4

Z flag of SREG

Question 5

JMP is a(n) ___-byte instruction.

Answer 5

4

Question 6

True or False.

In the AVR, control can be transferred anywhere within the 4M of code space by using the CALL instruction.

Answer 6

True.

Question 7

The CALL instruction is a(n) ___-byte instruction.

Answer 7

4

Question 8

True or False.

In the AVR, control can be transferred anywhere within the 4M of code space by using the RCALL instruction.

Answer 8

False.

Question 9

With each CALL instruction, the stack pointer register,SP, is _________.

(incremented or decremented)

Answer 9

Decremented

Question 10

With each RET instruction, the SP is ______.

(incremented or decremented)

Answer 10

Incremented

Question 11

On power-up, the SP points to address______.

Answer 11

0

Question 12

How deep is the size of the stack in the AVR?

Answer 12

The AVR’s stack can be as big as its RAM memory.

Question 13

The RCALL instruction is a(n) ____-byte instruction.

Answer 13

2

Question 14

______ takes more ROM space.

(RCALL or CALL)

Answer 14

CALL

Question 15

True or False.

In the AVR, the machine cycle lasts 1 clock period of the crystal frequency.

Answer 15

True

Question 16

The minimum number of machine cycles needed to excute an AVR instruction is____.

Answer 16

1

Question 17

The maximum number of cycles needed to execute an AVR instruction and for which instructions?

Answer 17

4; CALL, RET

Question 18

Find the machine cycle for a crystal frequency of 12 MHz.

Answer 18

12MHz/4 = 3MHz

MC=1/3MHz = 0.333µs

Question 19

Assuming a crystal frequency of 1 MHz, find the time delay associated with the loop section of the following DELAY subroutine:

DELAY: LDI R20,100

HERE: NOP

NOP

NOP

NOP

NOP

DEC R20

BRNE HERE

RET

Answer 19

[100x (1+1+1+1+1+1+2)]x 1µs=800µs=0.8ms

Question 20

True or False.

In the AVR, the machine cycle lasts 6 clock periods of the crystal frequency/

Answer 20

False; it takes 4 clock cycles

Question 21

Find the machine cycle for an AVR if the crystal frequency is 8 MHz.

Answer 21

MC= 1/8MHz=0.125µs=125ns

Question 22

True or False.

In the AVR, the instruction fetching and execution are done at the same time.

Answer 22

True

Question 23

True or False.

JMP and RCALL will always take 3 machine cycles.

Answer 23

True.

Question 24

True or False.

The BRNE instruction will always take 2 machine cycles.

Answer 24

False; Only if it branches to the target address.