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Microprocessors > Chapter 10 > Flashcards

Chapter 10 Flashcards

1
Q

What are the four common types of memory

A

ROM, EEPROM, SRAM, DRAM

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2
Q

The least significant address input

A

A0

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3
Q

are the points at which data are entered for storage or extracted for reading.

A

Data Connections

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4
Q

An 8-bit-wide memory device is often called a ________ memory

A

byte-wide

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5
Q

o Select a memory location within the memory device

A
  • Address inputs
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6
Q

o Have a set of data outputs or inputs/outputs

A
  • Memory devices
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7
Q

o Selects or enables the memory device

A
  • Chip select (CS)
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8
Q

o Also called Chip enable (CE)

A
  • Chip select (CS)
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9
Q

o Also called Select (S)

A
  • Chip select (CS)
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10
Q

o Gate

A
  • Output enable (OE)
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11
Q

o Control input often found on a ROM

A
  • Output enable (OE)
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12
Q

o must be active to perform a memory write

A
  • Write enable (WE)
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13
Q

o permanently stores programs and data that are resident to the system and must not change when power supply is disconnected

A
  • read-only memory (ROM)
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14
Q

o often called nonvolatile memory

A
  • read-only memory (ROM)
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15
Q

o more commonly used when software must be changed often or when too few are in demand to make the ROM economical

A
  • erasable programmable read-only memory (EPROM)
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16
Q

o programmed in the field by burning open tiny NI-chrome or silicon oxide fuses

A
  • programmable read-only memory (PROM)
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17
Q

also called Flash memory

A
  • electrically erasable programmable ROM (EEPROM)
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18
Q

also called EAROM (electrically alterable ROM)

A
  • electrically erasable programmable ROM (EEPROM)
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19
Q

also called NOVRAM (nonvolatile RAM)

A
  • electrically erasable programmable ROM (EEPROM)
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20
Q

o Newer type of read-mostly memory (RMM)

A
  • electrically erasable programmable ROM (EEPROM)
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21
Q

o retain data for as long as DC power is applied

A
  • Static RAM memory devices
22
Q

o no special action (except power) is required to retain stored data

A
  • static memory
23
Q
  • essentially the same as SRAM, except that it retains data for only 2 or 4 ms on an integrated capacitor
A

Dynamic RAM (DRAM) Memory

24
Q
  • Two special pins
A

o Column address strobe (CAS)
o Row address strobe (RAS)

25
Q

o Latest DRAM

A
  • DDR (double-data rate) memory device
26
Q
  • PLD
A

o Programmable logic device

27
Q
  • Three SPLD (simple PLD)
A

PLA
PAL
GAL

28
Q

o PLA

A

 Programmable logic array

29
Q

o PAL

A

 Programmable array logic

30
Q

o GAL

A

 Gated array logic

31
Q
  • CPLD
A

o Complex programmable logic devices

32
Q
  • FPGA
A

o Field programmable gate arrays

33
Q
  • FPIC
A

o Field programmable interconnect

34
Q
  • ASIC
A

o Application-specific integrated circuit

35
Q

o internally structured as a programmable array of combinational logic circuits

A
  • Combinatorial Programmable Logic Arrays
36
Q
  • HDL
A

o Hardware description language

37
Q
  • VDHL
A

o Verilog HDL

38
Q

o often called to location FFFF0H

A
  • Cold-start location
39
Q
  • SECDED
A

o Single error correction/double error correction

40
Q

o the 16-bit data bus must be divided into two separate sections called the

A
  • Banks
41
Q

o holds all the even numbered memory locations

A
  • low bank
42
Q

o holds all the odd-numbered memory locations

A
  • high bank
43
Q

o Contain a 64-bit data bus which requires either eight decoders or eight separate write signals.

A
  • Pentium through Core2 microprocessors
44
Q

o requires address multiplexing and refreshing

A
  • Dynamic RAM
45
Q

o Extended data output

A
  • EDO
46
Q

o stores the 256 bits selected by RAS into latches

A
  • EDO
47
Q

o used with most newer systems in one form or another because of its speed

A
  • SDRAM
48
Q
  • SDRAM
A

o Synchronous Dynamic RAM

49
Q

o Double data rate memory

A
  • DDR
50
Q

o latest improvement in a long string of modifications to DRAM

A

DDR

Microprocessors (28 decks)

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