Deck 1 Flashcards
(19 cards)
What is a bus?
A bus is a bundle of wires that communicate multiple bits at the same time.
IEEE-753 32bit Floating Point Format
X = (-1)^S 1.F x2^(E-bias) S1 - E8 - F23
What is the Instruction Set?
The complete set of instructions that invoke primitive operations is called the “instruction set”.
Rotational Latency?
The average time to wait for sector to be accessed to come to head.
Track Seek time?
Time to move head to required track.
Low/mild frequency streams: keyboard, mouse.
Interrupts: perfect for this, action is taken at the moment it is required. Polling: terrible, lots of CPU wasted on the polling loops. DMA: is a waste, after each transfer, the DMA device needs to generate an interrupt anyway, to initiate whatever required action.
High frequency streams: DSP.
Interrupts: no use, can’t keep up. Because of the high overhead of switching into and out of the ISR, all the saving and restoring registers. DMA: no use, need interrupt to get processing performed on each transfer. Polling: the only solution, only small number of times around the polling loop.
Block transfer: disks, tapes, ethernet, printers.
Interrupt: not good, because the high data frequency within the block makes interrupt unable to keep up. Even slow, long period means that overhead is too high. Polling: not good because of the possible long gaps between blocks, even if the data rate within the block is high. DMA: perfect for the form of transfer. It does the necessary bus transfer to move the data from one place to another with no instruction fetch or execution overhead, other than the initial programming of the DMA interface. It has the smallest overhead per transfer and uses bus cycles efficiently.
Structural Hazard, example and solution?
The structural hazard is caused when 2 or more instructions need the same recourse in the same pipeline stage. FDEMW, load and store need to use the system buses and instruction fetches must be stalled at these times. Solution: reduce by duplicating recourses. Separate instructions and data cache.
MMU and its benefit.
Memory management unit, used to translate logical memory address into physical memory address. Benefit: memory protection and memory management.
Paging and its benefit.
Logical memory space of program divided into smaller units of allocation called “Pages”. It solves the problem of fragmentation in segmentation.
Data hazard, example and solution?
Data hazards occur when the result of an early instruction is not available when needed. add $2, $3, $1 sub $8, $9, $2. Solution: bypassing, add additional hardware to bypass the result from ALU output back into ALU input.
Control Hazard, example and solution?
Control hazards occur at branch/jump instructions when the next instruction to execute cannot be determined. Example: bne $4, $5, +25. Solution: stall until direction is known.
FDEMW
F-instruction fetch, D-Cecode, register read E-execute(add, subtract), M-memory access, W-result write-back stage.
Problems with NMOS
1) When output voltage is 0V, there is a circuit through the logic gate from the 0V to the 5V power supply terminals and power is consumed. Need to keep resistance from output connection to 5V power supply high during this time to limit power consumption.2) Asymmetry switching time. Output: 0~5
Stream transfer and block transfer.
Stream of single data item, software activity required immediately on each data transfer. Block transfer of data items, activity only required after a block of data items been transferred. Maybe long gaps between blocks, but transfer frequency may be high within the block.
Segmentation and fragmentation.
Divide, allocate smaller part to each process. Fragmentation problem: Segments are too coarse grained units. We can end up having blocks of memory spaces, each too short to be allocated for a new segment but collectively large enough.
Virtual Memory.
Not all program has to be in memory for program to run, keep some pages of program on disk and load as required to memory.
Thrashing problem.
.available physical pages too few – no free pages
lots of swapping of pages as O/S scheduler switches between processes performance drops because of disk access overheads
run fewer programs or add more memory
