EEEE2071: Project Viva Flashcards
(25 cards)
Explain why the ESR (Equivalent Series Resistance) of the electrolytic capacitors used in the
project is important
- 3 Capacitors in forward converter to smooth output voltage each with ESR
- Forward converter current ripples at switching frequency which leads to voltage change and output voltage ripple (Vripple = Iripple x ESR)
- Therefore, ESR affects the stability and performance of the converter output
Why is it that we don’t need to consider the low frequency input voltage ripple when we
design the output filter of the Forward Converter?
- The 100Hz Low frequency ripple from the rectifier is double as negative ac input is inverted
- Converter filter have high cut-off frequencies, do not eliminate ripple and instead ripple is removed by closed loop control at later stage
When operating from the transformer derived DC input- why does the input capacitor DC
voltage reduce when we have the lowest resistance (highest power) load attached
- Lower load resistance at same voltage output increase current out
- Current in secondary related to primary current by turn ratio, so primary current increase
- Input capacitor discharges to supply current, so voltage is reduced
- I = C x dv/dt
Why does the PWM chip (and the other ICs in the circuit) need a decoupling capacitor?
- To prevent noise generated from the fast switching of the PWM chip disrupting other devices
Why have we decided to use Ferrite in all the magnetic components considered except for the
input transformer which is made of silicon steel?
- As the frequency for the components are too high for steel
- Whereas input transformer runs at 50Hz, so steel can be used
Why might it be better to wind the magnetic components with multiple strands rather than a
single wire of equivalent (approximately) cross sectional area?
- Multiple strands reduce leakage inductance by creating a better balanced magnetic field which minimises the strength of the leakage field
Since it is stated in the gate drive transformer document that a Ferrite toroid is a good option
for winding small components- why don’t we use a toroidal Ferrite core for the output filter
inductor?
- E-shape off ferrite core makes assembly easier
- E-Shape allows for air gap to make core more suitable for energy storage by giving high reluctance area
The PWM IC (UC3524) has a sawtooth generator which has an offset of 0.8V- why is it that
we don’t need to worry about this in the closed loop system using either a Type 1 or Type 3
controller?
- As the controllers is designed to deal with errors in the output voltage
- When output differs from voltage target, Vref can be adjusted to compensate offset while keeping same voltage output.
In the original specification document, a switching frequency of 75-150 kHz is defined. What
are the implications (benefits/drawbacks) of operating at these two extremes?
- Lower frequency means slower switching so less switching loss of diodes and MOSFET
- Lower frequency means less electromagnetic interference
- Lower frequency means larger magnetic component due to increase in energy
Why is the duty cycle of the isolated forward converter limited to <0.5?
- To allow magnetising current to return to zero before Q1 and Q2 are turned on again
- Otherwise the magnetising current would slowly keep rising until the transformer is saturated
What would happen to the current in the MOSFETs if the main transformer (not the input
transformer) was saturated? Why does this happen?
- Current would increase and damage MOSFET
- Using transformer B-H curve, when saturated, magnetic field intensity (H) increases significantly
- Ampere’s Law states H is directly proportional to Current so when main transformer is saturated, current increases significantly
Why is it that we cannot simulate the gate drives driving an actual MOSFET in PLECS? How
could we get around this and verify the basic operation of the gate drive circuit?
- PLECS simplified model uses signal input instead of voltage input so gate drive circuit can’t be connected to MOSFET
- Instead a small 200pF capacitor is used to simulate equivalent gate-source capacitance
For the gate drive circuit used in the project-. What is the purpose of C1? Why is it important
that C1 is not too large?
- To AC couple the transformer and gate driver IC, blocking DC
- If C1 too large, can lead to saturation of transformer
Why do we use a Zener diode rather than a standard diode in the gate drive circuit?
- To clamp the voltage sent to Vgs to about 18V as a voltage above 20V will destroy the MOSFET
Why do we need a gate driver chip such as the TC4425A? Why can’t we drive the MOSFETs
directly from the UC3524 PWM IC?
- PWM generator has 5V a maximum output and minimum amplitude of 12V needed to switch the MOSFET
- Gate driver chip used to amplify signal to operational value
Why is isolation needed in the gate drive circuit? Since we’re driving both MOSFETs with the
same demand (i.e. they are driven to switch on and off at the same time) why can’t we use a
single gate drive circuit for both?
- Gate drive must drive MOSFETS simultaneously but source pins aren’t commonly connected
- To turn both MOSFETS on, their gate-source capacitance must be charged
- Upper MOSFET: Primary winding
Lower MOSFET: DC input
For the gate drive transformer- does it matter how you wind the three windings onto the
toroidal core?
Yes as doing interleaved winding reduce leakage inductance by creating a better balanced magnetic field which minimises the strength of the leakage field
Why is feedback important for power supply control?
- Feedback allows for the load conditions to change while the output remains the same by comparing the output voltage with the desired output voltage
The control transfer functions are implemented using Operational Amplifiers- what alternative
might the project have used? How would this be approached?
- Using UC3524 PWM IC’s error amplifiers
- Connect reference and feedback voltages to input pins and PWM gate driver to output pins
What is the purpose of the “integrator” part of the controller/compensator transfer function
(Both type 1 and Type 3)?
- To generate a very small steady state error in error transfer function
- FInd Error Value: E(s) = Vin(s)/[1+G(s)] x s and let s tend to 0
- Apply Integrator: Multiply A/s to G(s) of error function, then multiply error function by s, let s tend to 0, error should be 0
Why is it important to achieve a reasonable phase margin in the design? What would be an
appropriate Phase Margin? Why is this?
- ω꜀ must be less than resonant frequency for reasonable stability, and ‘best’ value depends on filter characteristic and phase margin
- Appropriate Margin: > 60 Degrees as phase boost must be between 70 and 150
Why should we be careful when having a low Gain or Phase Margin?
- Low gain margin results in the system closing due to instability
- Low phase margin
Why is it important to not have significant open loop gain at the converter switching
frequency?
-Larger the open loop gain at switching frequency, larger the affect of switching noise in system
- Can’t eliminate switching noise so small open loop gain is optimal otherwise output could have large swings
What effect does the output filter capacitor ESR (Equivalent Series Resistance) have on the
Bode plots of the forward converter?
- Reduces the phase shift of the filter characteristic to 90 degrees
