ET VOL 6 Digital Data 12,6,7 Flashcards
(129 cards)
1
Q
Which of the following items is stored in main memory?
A
Data, programs, calculations, and operands
2
Q
Time interval from the instant a request for data is initiated until the data is available for use.
A
access time
3
Q
The output side of a flip-flop is read from memory without having to be rewritten
A
non-destructive readout
4
Q
The power to the computer is turned off and the contents of memory are retained.
A
nonvolatile memory
5
Q
The particular location of a larger memory array where a packet of information is located.
A
memory access
6
Q
Power is shut off to the computer and the contents of the semi- conductor memory are lost.
A
volatile memory
7
Q
The data is lost when it is read from memory.
A
destructive readout
8
Q
A memory unit that can receive requests from more than one CPU or I/O section is known as which of the following types of memories?
A
Multiported memory module
9
Q
Pcb type memories are usually composed of which of the following memory types?
A
Semiconductor
10
Q
In a typical square form memory, the intersection of an x row and y column is called a
A
memory word address
11
Q
The x rows and y columns of a typical memory will be equal in number.
A
true
12
Q
Memory operations in most computers usually include which of the following items?
A
- Control circuits 2. Timing circuits 3. Memory cycle
13
Q
Memory interface circuits include which of the following items?
A
Communication lines Interfacing register
14
Q
A word is read from memory, then rerouted back through the Z register to be rewritten. This is what type of memory?
A
Destructive readout
15
Q
Priority of memory requests are evaluated by which of the following devices?
A
Control circuits
16
Q
Memory read/write enables are provided by which of the following devices?
A
Timing circuits
17
Q
what is the memory cycle
A
read/write
18
Q
During a complete memory cycle, the first thing that must occur is which of the following?
A
Memory address translation is accomplished
19
Q
main memory is also called
A
ROM
20
Q
To locate a memory address word, the computer uses which of the following items in memory?
A
Memory logic
21
Q
The conversion from a logical to a physical memory address is a function of which of the following items in memory?
A
Memory logic
22
Q
In all computers, for every read operation there will always be a corresponding write operation.
A
false only in destructive memory
23
Q
In order to increase memory speed using interleaving, which of the following items are required?
A
More complex CPU and memory control circuitry
24
Q
When odd parity is used for memory fault detection, all words stored in memory will have which of the following bits?
A
An odd number of set bits stored at each memory location
25
The memory protection register set is used for which of the following purposes?
To restrict read/write operations in portions of memory
26
In a memory segment within the protected area with all three bits of the memory protection control register set, which of the following operations are allowed?
1. Execute protected 2. Write protected 3. Read protected
27
Memory lockout is used by larger computers to prevent access to particular areas of memory by task state instructions. Which of the following describes the lockout function?
It is disabled when the CPU enters a particular executive or interrupt state and disabled when the CPU enters the task state
28
Compared with semiconductor memories, magnetic memories have which of the following advantages?
They require less power and they are nonvolatile
29
The state of a core or film is changed by which of the following conditions?
Current flow in the opposite direction of sufficient magnitude to overcome the magnetic field and to magnetize in the new direction
30
Compared with core memory, film memory has which of the following advantages?
Increased speed of read/write operations and less power required 2. More compact and durable 3. Twice as many memory cells can be put in the same space for the same amount of power
31
Each ferrite core can store what total number of bits?
1
32
In a four-wire core winding, what is the physical make up of the windings that are strung through each and every core?
2 drives lines, 1 sense line, and 1 inhibit line
33
What Detects the change in state of the core from one to zero.
Sense Line
34
What Each line provides 1/2 of the current necessary to change the state of the core.
Drive Line
35
What Prevents changing the core from a zero to a one.
Inhibit Line
36
In a three-wire core, this line performs the same function as in the four-wire core.
Sense
37
To simplify addressing, reading, and writing operations, magnetic cores are arranged in which of the following ways?
In matrices
38
Which core in an array will be switched from one state to another?
A core with a full read or write current passing through it
39
In a core array the inhibit line is threaded in (a) with the x or y drives (series, parallel) lines and the sense line threaded through (b) core. (each, every other)
(a) Parallel (b) each
40
What is the basic building block of the memory stack?
Memory Plane
41
The address register bits are used to translate the bits to make which of the following bit selections?
X and Y primary, secondary, and diode; stack; and inhibit upper and lower stack
42
Which selectors are activated only when writing zeros?
Inhibit
43
In a core read/write cycle, the read current is designed to change the state of the core(s) to (a) what value; and the write current is designed to change the state of the core(s) from (b) what value to (c) what value?
(a) Zero (b) zero (c) one
44
The process of reading cores to the zero state is known as which of the following types of readout?
Destructive readout
45
In a core memory, a restore cycle is necessary after data has been read from memory for what reason, if any?
To change the state of each selected core from zero to one
46
During a restore operation of zeros in a three-wire core, the absence of write current on which of the following lines will leave the cores in the zero state?
Digit
47
What specific number of paired film spots is used for each bit position?
Two
48
Current flow through which of the following lines will magnetize a film spot?
Word or sense/digit, depending on the function
49
In a film memory, a packet stores what specific number of bits of data?
2
50
Which, if any, of the following devices makes the mated film cells less susceptible to the disturbance from other cells in close proximity to them?
keeper (2nd film)
51
How is mated film memory structured?
Word organized
52
What item is the basic building block of the film memory stack?
packet (mated Film)
53
The memory capacity of a film core storage device is determined by which of the following factors?
Number of packets and the size of the array in the memory stack
54
In film storage, up to how many words can be selected at each memory location?
4
55
The address register bits used to translate the bits to make selections are processed in which of the following sequences?
Stack, memory location, and word at the address location
56
A mated film memory cell is read by which of the following methods?
A current is generated along the word line and a transverse field is applied to the thin film cell
57
What factor will determine the recorded state of the film?
The direction of the cell vector rotation induced film signal on the sense/digit line
58
When a one is to be stored, (a) what is the direction of the bit current in relationship to that used to store a zero and (b) what field steers the vector to the one state?
(a) Reversed (b) Longitudinal
59
In a restore operation of a film memory, what factor determines the direction of the digit current on the sense/digit line?
Binary value of the data register
60
Semiconductor memories are known by all of the following terms except which one?
Read-only memory (RAM)
61
Semiconductor memories have which of the following characteristics?
Non-destructive readout and volatile
62
Each RAM chip contains which of the following items?
Large numbers of memory cells and the logic to support them
63
The transistors used in flip-flops of static RAM may be MOS or bipolar. Compared to MOS, bipolar has what advantage, if any?
Higher access speed
64
In a static RAM, the address lines are used to enable the addressed memory cell flipflop circuit by row and column number.
true
65
Data is stored, or read from, the memory cells of SRAM via a total of how many lines?
4
66
The (a) address lines and the (b) I/O data lines are usually tied to what buses?
(A)Computer or memory system bus (B)Data bus
67
Each dynamic RAM cell consists of which of the following devices?
One MOS transistor and one tiny capacitor only
68
DRAM cells do not retain their charged state for more than a few milliseconds. This degradation is due to which of the following factors?
Time and temperature
69
To retain their charged state, DRAMs must be refreshed. Of the following methods, which one is (a) more cost effective because it uses what (b) device?
(A)External (B)Single refresh address generator
70
In DRAM organization, the data input and data output lines may be tied together in what type of application, if any?
One that uses a bidirectional data bus
71
Programs stored on ROM are often referred to as firmware for which of the following reasons?
They are more hardware than software
72
Compared to RAM, ROM has all of the same operational characteristics except which of the following?
Can be written to by normal computer accessing methods
73
ROM has what primary use?
Allows the computer to perform I/O operations
74
The acronym BIOS stands for what term?
Basic input/output system
75
The acronym NDRO stands for what term?
Non-destructive readout
76
In the example, the ROM chip memory array has a total of(a) how many decoders and (b) how many lines are input to these decoders?
(a) 2 (b) 13
77
ROMs may be made of which of the following materials?
Hardwired, magnetic, fusible links, and MOS and bipolar transistors
78
To perform ROM operations, which of the following circuits are used?
Timing, control signals, registers, flipflops, and internal buses
79
Compared to PROM, an erasable PROM has what additional advantage, if any?
It can be erased and reprogrammed
80
While still in the circuit, which of the following PROMS can (a) be programmed and (b) erased?
(a) EAPROM/EEPROM (b) EAPROM/EEPROM
81
A device that serves as a shared entry point from a local-area network into a larger information resource is which of the following?
Gateway
82
A function that transfers status by using the appropriate control signals from a transmitting device to the receiving computer is which of the following?
Input data (ID)
83
The I/O processor controls which of the following transfers?
The transfer of information between main memory and the external equipments
84
Establishing, directing, and monitoring transfers with external equipments are the functions of which of the following devices?
IOC input output controller
85
Changes to input and output control and data signal voltages are functions of which of the following devices?
IOA Input output adapter
86
The type of connectors for the I/O channels or ports will be dictated by which of the following factors?
Interfacing
87
The driver circuits are used for which of the following tasks?
To pass interface and data signals to the external equipments
88
Examples of consistencies found in the architecture of a computer’s I/O section include which of the following?
The arrangement and format of the information exchanged
89
If a printer senses a paper jam during a print operation, which of the following actions would occur?
A control word would be sent to the computer specifying an error condition (external interrupt)
90
Handshaking is also known by which of the following terms?
Function control word
91
The type of interface used when all bits of information represented by a byte or word are input or output simultaneously is known as which of the following formats?
Parallel format
92
Command instructions provide control over which of the following areas/operations?
IOC single and dual channel operations
93
The I/O command start instruction accomplishes which of the following actions?
Specifies an IOC, then halts further CPU processing
94
The CPU will delay processing while waiting for an I/O operation only during which of the following actions?
Executions of an I/O command start instruction
95
The actual execution of chaining instructions is independent of the CPU.
true
96
Input and output chains deal primarily with which of the following activities?
Transfer of blocks of information
97
Data transfer between the computer and external equipments will take place when which of the following conditions is/are met?
Initiate input/output or equivalent instruction is executed by the CPU
98
Which of the following is one of the constants in all I/O operations?
When the data transfer will begin
99
In I/O operations, communications with the external equipment require which of the following devices/operating modes?
A single channel operating mode
100
When an index address in main memory is specified by an external equipment during an I/O operation, the computer is operating in which of the following modes?
Externally specified index mode (ESI)
101
In I/O operations, which of the following is one of the primary uses of registers?
To enable and route both control and data information, CPU I/O and memory
102
Decoder circuits are used for which of the following purposes?
Address translation
103
Status registers are used for which of the following purposes?
To hold information for the CPU that indicates the operating condition and current activities of the external equipments
104
In computers with an IOC, once started the master clock can be stopped when which of the following actions occurs?
Computer master clear
105
In computers with an IOC, the master clock is started when which of the following actions occurs?
1. The computer is initially powered on 2. The computer is auto restarted
106
The I/O control circuits are controlled by which of the following means?
the computer program
107
A sequential set of memory locations that contains data to be sent out or an area that is set aside for data to be received is called which of the following?
A buffer
108
Which of the following are unbuffered operations?
CPU and various parts of the computer
109
The I/O processor’s sequencing circuits control which of the following actions?
The order in which events will be executed based upon the translated function code
110
The CPU interfaces with the I/O processor through which of the following means?
The CPU’s I/O instructions
111
I/O control memory words are set aside in main memory to control which of the following actions?
Data transfers for I/O buffer functions
112
In parallel operations, each I/O channel has its own block of memory addresses for which of the following operations?
Input, output, external function, and external interrupt operations
113
Serial operations are affected by which of the following factors?
Character size, parity selection, baud rate, and synchronous and asynchronous interfacing
114
Monitor words are used for which of the following purposes?
To store characters for comparison with received data characters
115
Another term for accumulator based I/O is which of the following?
Direct CPU interface
116
The CPU handles all I/O transactions by executing one or more instructions for each word of information transferred. This process is known by which of the following terms?
Accumulator based I/O (direct CPU interface
117
In memory mapped I/O, the CPU accesses the I/O device by which of the following means?
Placing appropriate addressing information on the bus
118
The main advantage of direct memory access is which of the following?
speed
119
When the CPU and the DMA attempt to access main memory simultaneously, the CPU has priority.
false DMA (direct memory access)
120
When a high speed disk drive is used, output data will be in which of the following forms?
Binary
121
The technique used when more than one peripheral device is connected to a single port/channel is known by which of the following terms?
Daisy chaining
122
When more than one peripheral device is connected to a single port/channel, the priority of a device is determined by which of the following factors?
CPU
123
When using a request and acknowledge system, the priority of the fictions and channels is determined by which of the following factors?
The I/O controller
124
Communication formats are governed by which of the following items?
The interfacing standard
125
The compatibility of voltage levels between the computer and external equipments is ensured by which of the following means
The I/O processor
126
Transfer of data within a digital computer is accomplished internally using which of the following means?
Parallel format
127
The conversion of data for transmission over a serial channel is accomplished by which of the following means?
A universal receiver-transmitter
128
When a universal synchronousasynchronous receiver transmitter is used, it functions as which of the following devices?
A peripheral device to the microprocessor
129
The universal synchronous-asynchronous receiver transmitter’s specific asynchronous interfacing is controlled by which of the following means?
The CPU
