gates + transistors

Question 1

When will an AND gate output a logic high (1)?

Answer 1

when all inputs are logic high (1)

Question 2

When will an OR gate output a logic high (1)?

Answer 2

when either of the inputs are logic high (1)

Question 3

How many rows will a truth table have if a logic gate has 3 inputs?

Answer 3

8

Question 4

What is the logic of a NAND gate?

Answer 4

an AND + NOT gate together

Question 5

What is the logic of an OR gate?

Answer 5

an OR + NOT gate together

Question 6

What does an equation using the property of absorption look like?

Answer 6

x * (x + y) = x
x * x + x * y
x + x * y
x (1 + y)
x (1)
x

Question 7

What are the two De Morgan’s Laws?

Answer 7

!A + !B = !(AB)
!A!B = !(A + B)

Question 8

How does an XOR gate work?

Answer 8

a(XOR)b = a’b + ab’
the output is 1 if odd number of inputs are 1
and 0 if even number of inputs are 1

Question 9

What is the procedure for the Sum of Products (SOP)?

Answer 9

1. Find the rows with the “1” output
2. Write the product-form expression for the inputs in that row (A’=inverted, A=normal)
3. Combine the products in step 2 into a sum (OR gate the results)

Question 10

What is the procedure for the Product of Sums (POS)?

Answer 10

1. Find the rows with the “0” output
2. Write the sum-form expression for the inputs in that row (A = normal (0), A’ = inverted (1))
3. Combine the sums in step 2 into a product and AND the results

Question 11

What 3 terminals does a transistor have?

Answer 11

source, drain, gate

Question 12

How does a transistor react when a voltage is applied?

Answer 12

If a voltage is applied to the gate, current can flow from source to drain. otherwise, the switch is off

Question 13

What happens to NMOS and PMOS when a 1 (voltage) is applied at the gate?

Answer 13

NMOS doesn’t let the voltage through, but PMOS does

Question 14

What happens to NMOS and PMOS when a 0 (voltage) is applied at the gate?

Answer 14

PMOS is closed off, but NMOS lets the voltage through

Question 15

what is the difference between a node and a terminal?

Answer 15

a node is a term affiliated with the entire network, but terminal is only associated with a specific element

Question 16

what are the technical terms for power source and ground in a digital circuit?

Answer 16

power source - vdd
ground - gnd

Question 17

How would you form a NOT gate inverter using PMOS and NMOS transistors?

Answer 17

place the PMOS on top of the NMOS, make a wire connection between the two, and connect the vdd through the top of the PMOS and connect the gnd through the bottom of the NMOS transistor.

Question 18

How would you form an AND gate using PMOS and NMOS transistors?

Answer 18

connect a NAND gate and a NOT gate to make and. use a branch system to connect two PMOS transistors side by side and a wire joining them in the middle, and then two NMOS transistors stacked on top of each other connected to one GND. and then stem a NOT gate from the center of the NAND gate.

Question 19

How would you form an OR gate using PMOS and NMOS transistors?

Answer 19

stack two PMOS transistors on top of each other with one vdd coming out the top, then connect to a branch of two NMOS transistors side by side with two gnds. then stem to a NOT gate.

Question 20

what is the difference between a “branch” on the bottom of the gate vs the top?

Answer 20

A “branch” on top is the pull up network (PUN) pulling the voltage towards the vdd (NAND) and the “branch” on the bottom is called the pull down network (PDN) pulling the voltage towards the gnd (NOR)

Question 21

What is a basic explanation of a 2-way multiplexer?

Answer 21

the output is equal to one of two inputs, based on a selector

Question 22

Explain a two to four decoder

Answer 22

When the selectors are certain values (00, 01, 10, 11), it will allow a specific data input with its value to pass through. n inputs, 2^n outputs

Question 23

what is lithography used for?

Answer 23

it is needed to create source/drain/gate

Question 24

what is a binary to 1 hot decoder

Answer 24

converts a symbol from binary code to a one-hot code