synchronous logic Flashcards
explain a Reset-Set (RS) Latch
An RS latch takes two inputs: set and reset. if the s is 1, the output is 1 for “set” and if the r is 1, the output is 0 for “reset”. 00 outputs the previously stored bit and 11 is unknown.
what is the difference between a sequential and a combinational circuit?
a sequential circuit’s output is dependent on the present and the past sequence of input values and a combinational circuit is dependent only on the present combination of input values
what will happen if both s and r values were 1?
the program will rapidly output 1s and 0s back and forth, but will not store any value and will cause oscillation.
explain a D latch
a D latch stores one bit, with input d having the bit to be stored, and an input e that when the value 1 enables storing the bit and the stored bit comes out on the output.
when does a D latch have an oscillation problem
if both inputs were 1s then both change back to 0s
what is a clock signal, clock cycle, and clock frequency?
a clock signal controls when to store bits, and they are only stored at a clocks rising edge (the instant a clock changes from 0 to 1). a clock cycle is the time between two rising edges and clock frequency is cycles per second
explain a D flip flop
a latch stores a new bit while an enable input is 1, but a flip-flop only stores a new bit at the instant of a clock input’s rising edge. (edge-triggered)
when does the D Flip Flop remember the previous state
when the negative trigger is switched to rising edge and vice versa
what is the difference between a d-latch and a d flip flop?
the D-latch is a level triggering device, meaning the output of the latch changes whenever the input changes. the D flip-flop is a edge triggered device because it is controlled by a clock signal.
