Instruction Set Architectures (ISAs) Flashcards

Question

What does floating point instructions do?

Answer 1

floating point operations, add, multiply, divide

Answer 2

decimal add, decimal divide, decimal-to-character conversion

Answer 3

String move, compare, search

Answer 4

Pixel/vertex operations, compression/decompression

Answer 5

Load conditional branch compare store add The 10 most used instructions stand for 96% of all instructions used. This is a good example of why it is beneficial and important to design after the common case and make the common case fast

Answer 6

Defined from the opcode of the instruction.

Answer 7

Determined by the operation itself. E.g. when doing integer arithmetic, operands are either 32- or 64 bits. floating point are the floating point standard - single or double precision.

Answer 8

Big- and little endian. These tells how bits are ordered within a word.

Answer 9

MSB has the lowest address

Answer 10

LSB stored at lowest memory address

Answer 11

Endianess and alignment

Answer 12

Alignment deals with how memory is accessed. An address A of an object stored in memory with size s, is aligned if A mod s == 0. Alignment ensures that you don't access parts of different objects and putting them together. Access is aligned if address is a multiple of the size of the object being accessed. Example: If an object is 2 bytes. Address 0, 2, 4 are aligned addresses. Address 1, 3 would misaligned as A mod 0 != 0. Many computers expect accesses larger than a byte to be aligned since this simplifies the implementation.

Answer 13

Displacement addressing, but the register is always the PC

Answer 14

Register Immediate Displacement Register indirect Indexed Direct or absolute Memory indirect Autoincrement Autodecrement Scaled PC-relative

Answer 15

Simply use the name of the register and access the value in it. used when a value is in a register Add r4, r3

Answer 16

provide a constant as part of the instruction used for handling constants Add r4, #3

Answer 17

Displacement both provides an immediate value and a register value. Adds the immediate to the register value, and retrieves this memory address. Add r4, 100[r4] (ldr r5, [r4, #3]) - maybe useful for example when accessing the stack. Here you would access memory relative to the stack pointer, and these offsets would be constants.

Answer 18

When you use a register as a pointer. Get a register value and use that to access memory. Register contain address, use this address to fetch memory value. Add r4, [r1]

Answer 19

Have two registers, the base register and the offset register. Add the value of these registers together and fetch memory from the resulting address. add r3, [r1 + r2]

Answer 20

Provided constant is used as pointer (memory address). Add r4, [ox1001]

Answer 21

The value in the register is used to access memory, and this memory-value is used to access memory. So memory value is used to access memory mem[mem[r2]]

Answer 22

Uses value in register to access memory. After accessing, the value in the register is incremented. Useful when accessing arrays for incrementing address by an element. Add r1, [r2]+

Answer 23

Uses value in register to access memory. After accessing, the value in the register is decremented. Useful when accessing arrays for incrementing address by an element. Add r1, -[r2]

Answer 24

Add values in register together, and add a scaling factor. Use this to access memory add r1, 100[r2][r3] Mem[100 + Reg[r1] + Reg[r2]*d]

Answer 25

Reduces the instruction count

Answer 26

Complicates the CPU significantly. Maybe even to the point where avarage cycle per instruction increases.

Answer 27

for a 32 bit immediate, you could copy the 20 most significant bits to the left bits of the register. then you OR with an 12 immediate to get the lower 12 bits.

Answer 28

Immediate, displacement and register indirect these capture 75-99% of addressing modes used (again, common case)

Answer 29

Displacement address should be 12 to 16 bits

Answer 30

8 to 16 bits

Answer 31

lui (load-upper-immediate)

Answer 32

Sequence of instructions without any embedded branches (exceps at the end) No branch targets (except at the beginning)

Answer 33

Conditional branches Jumps (unconditional branches) Procedure calls Procedure returns

Answer 34

Explicitly: Commonly offset to PC (PC-relative) Implicitly: Use register to specify address

Answer 35

Include an offset to the program counter (PC relative addressing) Advantage: Branching happens independently of where program was loaded in memory Disadvantage: Branch needs to be relative close to PC

Answer 36

Most branches are short - i.e. a loop, meaning branch target is close. Get position independence. The branch is independent on where the branch was loaded into memory

Answer 37

Used when branch target is not known at compile time. Load a memory address into a register. Use instructions to specify that we will interpret this register as an address to do some code. useful for switch statements and virtual functions, function pointers or dynamically shared libraries.

Answer 38

Usually within 10 bits

Answer 39

Can use the lui instruction Take the lui instruction to store the 20 most significant bits in a register then use jalr instruction (jump and link register) with an immediate with the remaining 12 bits which adds these bits to the bits in the register used in jalr, which is the register where we stored the 20 most significant bits lui x1, <20 MSB> jalr x1, x1, <12 LSB> You can also jump PC-relative with a 32 bit offset: auipc (loads 20 MSB) jalr (load 12 LSB) the difference when using auipc is that the 20-bit operand is not a constant but an offset (from PC)

Answer 40

Condition Code (CC) Condition register/limited comparison Compare and branch

Answer 41

All ALU operations sets some special bits. Use these bits when branching. Advantage: sometimes condition is set for free Disadvantage: CC is extra state. Constrain the ordering of instructions because they pass information from one instruction to another. create a dependency that is not easily identifiable

Answer 42

Test an arbitrary register with result of comparison (EQ, Zero, ...) Advantage: simple Disadvantage: Limited compare may affect critical path or require extra comparison for general condition.

Answer 43

Compare is part of branch, fairly general compares are allowed (GT, LT, EQ) Advantage: Branch and compare in one instruction instead of two Disadvantage: May end up creating a critical path for instructions.

Answer 44

Unconditional jump. Register state needs to be saved before entering the callee

Answer 45

Tells what state needs to be saved by the caller and the callee respectively. Saving is done by using the stack-

Answer 46

Registers that do not need to be saved in regards to caller-callee conventions

Answer 47

Stack: grows downwards heap: dynamic data static data: global variables. known at compile time text: program reserved

Answer 48

Saved argument registers (if any) return address saved saved registers: restored before return Local arrays and structures

Answer 49

Lean towards load-store architecture Support displacement, immediate and register indirect addressing modes Support 8, 16, 32 and 64-bit integers, and 32- and 64-bit floating. Instructions for simple ops (arithmetic, load, store, ...), PC-relative conditionals, Jump and link instructions for procedure calls, register indirect jumps for procedure returns

Answer 50

Specifies the operation to be done.

Answer 51

Must include opcode to specify instruction Need to balance: - desire to have many registers and addressing modes - Lower average program/complexity favors fewer registers and fewer different modes - instructions should be easy to decode Need to decide if we want a fixed or variable instruction size

Answer 52

Fixed are easier to decode but allows for less registers and addressing modes. can hurt program size. Variable size allows you to do whatever you'd like and is very flexible, but tends to become complex. Mixed instruction set types are used to include both and handle the disadvantages

Answer 53

Front end per language: transform languages into intermediate form High-level optimizations: largely machine independent Global optimizer: lower level optimizations, less and less language dependent - more machine dependent (register allocation) Code generator: independent on language but very dependent on machine

Answer 54

Provide regularity: Ideally an ISA should be independent - all instructions support all addressing modes Provide primitives, not sollutions: complicated instructions tend to not be used, very specific to how program is written Simplify trade offs between alternatives: make it easy for the writer to understand the trade-offs to find the best instruction sequence in a given case. Provide instructions that bind quantities known at compile time as constants: avoid recomputing things that are already known

Answer 55

General purpose register model and load-store architecture displacement, immediate and register indirect addressing with appropriate displacement 8, 16, 32, 64 int, and 32, 64 float focus on simple dominating instructions load, store, add, subtract, move register-register and shift branching and compare according to analysis of sufficiencies in modern computers at least 16 (preferably 32) registers, orthogonal, minimalist ISA

Answer 56

It's a hybrid instruction set. Different variants: 64 bit, embedded, 32 bit, atomic instructions, ... benefit of having multiple extension is that having a base instruction set + extension means that you do not need to implement all extensions every time.

Answer 57

R-type: register-register instructions, ALU I-type: loads and ALU operations on immediates S-type: store, compare, branch U-type: jump and link, jump and link register

Answer 58

destination register For the different instruction types, this register is mostly in the same place (R, I, U), if not in same place - it is not in the instruction

Answer 59

Source registers, also in the same place for the instructions. If it is not, the instruction type does not have this register

Answer 60

load and stores, move data between memory and registers, or between integer and FP l: load b: byte u: unsigned s:store Use combination of these to get different opcodes

Answer 61

Arithmetic, shifts, binary logic, remainder

Answer 62

(Don't use any explicit memory addresses) Push operands on stack Do operations on values in stack Result is stored on stack Pop result from stack

Answer 63

Have one accumulator where an operand can be stored Operations are done on the value in the accumulator, and one additional operand Store result in memory

Answer 64

Can use both memory-addresses (vaules stored in memory) and registers. One operand can be loaded into a register. Then an operation can be done on the register value and an directly on an operand that is stored in memory (not loaded) Store result in register store register value in memory.

Answer 65

Load both operands to seperate registers. Do operation and store result in new register Store result from register in to memory