Memory Management: Demand Paging Flashcards
What is Virtual/Logical Address Space?
It is the memory the programmer perceives their program to have.
What is Physical Address Space?
It refers to the actual location of the program within the physical memory.
List the Memory Mapping Methods.
○ Base and bounds
○ Segmentation
○ Paging
Explain Segmentation.
Segmentation enables memory sharing between processes. This is achieved by:
● Creating a segment for the shared data.
● Adding a segment entry in the segment table for each process, pointing to the shared segment in memory.
For instance, running the same program in different processes might require sharing code, or reading the same file in different processes might involve sharing memory corresponding to the file. Segmentation allows for this memory sharing that base and bounds cannot
What is the base and bounds memory mapping method?
A method of memory mapping that uses a base register to store the starting address of a process’s memory in physical memory and a bounds register to store the size of the process’s memory.
What is external fragmentation?
External fragmentation occurs when there is enough free memory to satisfy a request, but the memory is not contiguous.
What is memory compaction? What are its drawbacks?
Memory compaction is a technique used to reduce external fragmentation. It involves rearranging segments in physical memory to get rid of holes.
○ Memory compaction is expensive and inefficient.
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What is paging? What are a page and a frame?
○ Paging is a memory mapping method that divides a process’s address space into fixed-size portions called pages and physical memory into fixed-size portions called frames.
○ The size of a page is equal to the size of a frame.
What are the two components of a virtual address in paging?
○ VPN: Virtual page number
○ Offset: offset within the page
What is a page table?
A data structure used to map virtual addresses to physical addresses. It is indexed by page number and contains the frame number of the page in memory. Each process has its own page table.
What problems arise from large page tables?
○ Page tables can become very large, especially with large address spaces.
○ A large amount of memory may be required just to store page tables.
○ Address spaces are often sparsely used, meaning that a significant portion of the page table may be unused.
○ Access to unused portions of the address space may appear valid, which is undesirable.
What is the valid/invalid bit in a page table entry?
○ A bit that indicates whether a page is currently in memory (valid) or not (invalid).
What are multi-level page tables?
○ A solution to the problem of large page tables. They use a hierarchy of page tables, where entries in higher-level page tables point to lower-level page tables.
What is internal fragmentation?
○ Internal fragmentation occurs when a portion of a page is unused.
What is the problem with paging address translation performance?
○ Paging address translation requires two memory accesses: one to access the page table and another to access the actual data.
○ This can significantly reduce performance, as memory access speeds are often a bottleneck.
What is the TLB?
○ A small, fast hardware cache that stores recent page table entries to speed up address translation.
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Describe the steps involved in a TLB hit.
○ The MMU looks up the virtual page number in the TLB.
○ If the mapping is found, the MMU uses the frame number from the TLB to access the physical memory.
○ Only a single memory access is required.
Describe the steps involved in a TLB miss.
○ The MMU looks up the virtual page number in the TLB.
○ If the mapping is not found, a TLB miss occurs.
○ The MMU then accesses the page table in memory to get the frame number.
○ The (frame number, page number) mapping is added to the TLB.
○ The MMU retries the address translation, which now results in a TLB hit.
How is the TLB implemented to be fast?
○ The TLB is implemented using associative memory, which allows for parallel lookup by content.
Why is the TLB small?
○ Associative memory, used to implement the TLB, is expensive.
What are temporal and spatial locality?
○ Temporal locality: Recently accessed data is likely to be accessed again soon.
○ Spatial locality: Data near recently accessed data is likely to be accessed soon.
How can TLB hit rate be improved?
○ Take advantage of temporal and spatial locality.
What is the issue with context switching and the TLB?
○ When switching between processes, the TLB may contain entries for the previous process.
○ If the new process accesses a virtual page that is mapped in the TLB but belongs to the previous process, it may access the wrong memory.
Describe two solutions to the context switching issue with the TLB.
○ Solution 1: Invalidate all TLB entries on process switch. This ensures that the new process starts with an empty TLB and avoids accessing wrong memory. Drawbacks: makes process switch expensive and new process incurs 100% TLB misses initially.
○ Solution 2: Add a process identifier (PID) to TLB entries. This allows the TLB to distinguish between entries from different processes. The TLB match occurs only when both the page number and PID match. This solution is cheaper because nothing needs to be done during context switching.
