My Memory Palace-1 Flashcards
Code Review and Testing
POP Is Reworking the Floor Up stair.
Planning, Overview, Preparation, Inspect, Rework, and Follow Up.
Penetration Test Process
Mnemonic: PI-VERsion
- Planning (Scope of the test, Management approval)
- Information Gathering (Network discovery scan, enumeration)
- Vulnerability Scanning (Network/Web vuln scan)
- Exploitation
- Reporting
Asymmetric Algorithms
SA brothers
EE Sisters
Guy name Diffie and his knapsack
RSA and DSA
ECC and El Gamal
Diffie Hellman and knapsack
Symmetric Stream algorithm
RC4
Symmetric Algorithms Mnemonic
a FISH named DES had an IDEA on how to make RC4 and AES SAFER
TwoFish, DES, IDEA, RC4, AES, SAFER
HASHES a bunch of MD’s hanging out with SHA’s HAVAL the RIPE MD TIGERs
SHA, HAVAL, RIPE, MD, TIGER
Clark Wilson-Model IVP CDI Transformation
Integrity Verfication Procedures Constrained Data Items Maintained well-formed Transaction
Six types of controls
Directive, Deterrent, Preventive, Corrective, Recovery, and Compensating controls
ISO/IEC 15288:2015
is a systems engineering standard covering processes and life cycle stages. It defines a set of processes divided into four categories:
- Agreement
- Organization Project-Enabling
- Technical Management
- Technical
ISO 15408
Common Criteria. provides a structured methodology for documenting security requirements, documenting and validating security capabilities
ISO/IEC 21827:2008
Systems Security Engineering – Capability Maturity Model (SSE-CMM). Metric standards covers: a. The entire life cycle b. whole organization, management and engineering c. cocurrent interaction w/other discipline d. Interaction w/other organization, acquistion, certification, accredidation, and evaluation
Capabilities List
maintains a row of security attributes for each controlled object (asset) managed through the model
Security Label
a permanent part of the object it references
Data Hiding
important concept in multilevel security systems, ensuring that data existing at one security level is not visible to a process running at a different security level
To be secure, the kernel must meet three basic conditions:
a. Completeness (complete mediation): All accesses to information must go through the kernel b. Isolation: The kernel itself must be protected from any type of unauthorized access c. Verifiability: The kernel must be proven to meet design specifications
Processor - Perform four key tasks:
- fetching 2. decoding 3. executing 4. storing
most common ways to achieve memory protections
- Segmentation - dividing a computer’s memory into segments. A reference to a memory location includes a value that identifies a segment and an offset within that segment. 2. Paging - divides the memory address space into equal-sized blocks called pages. A page table maps virtual memory to physical memory. Unallocated pages and pages allocated to any other application do not have any addresses from the application point of view. 3. Protection keying - divides physical memory up into blocks of a particular size, each of which has an associated numerical value called a protection key. Each process also has a protection key value associated with it. When memory is accessed, the hardware checks that the current process’s protection key matches the value associated with the memory block being accessed; if not, then an exception occurs.
memory manager provides for the following
a. provide an abstraction level for programers b. Maximize performance with the limited amount of memory available to the system (Physical RAM) c. Protect the operating system and applications once they are loaded into memory
Memory Manager has the following 5 responsibilities
- Relocation 2.Protection 3.Sharing 4.Logical organization 5.Physical organization
Class of fire A B C D K
A ash
B boil
C current
D dent
K kitchen
Two types of registers use by CPU to identify memory addresses
- a base register is used to identify the beginning address asssigned to the process 2. a limit register is used to identify the ending address assigned to the process
Take-Grant Model
Uses a set of rules to enfore how rights can be passed from one subject to another or from subject to an object.

Multilevel Lattice Models
describes strict layers of subjects and objects and defines clear rules that allow or disallow interactions between them based on the layers they are in. Subjects are assigned security clearances that define what layer they are assigned to and objects are classified into similar layers. Related security labels are attached to all subjects and objects. According to this type of model, the clearance of the subject is compared with the classification of the data to determine access. They will also look at what the subject is trying to do to determine whether access should be allowed.
Noninterference Models
a type of multilevel model with a high degree of strictness. These models not only address obvious and intentional interactions between subjects and objects, but they also deal with the effects of covert channels that may leak information inappropriately. The goal of a noninterference model is to help ensure that high-level actions (inputs) do not determine what low-level users can see (outputs).


