NP 13-14 Flashcards
(11 cards)
Describe a floating point number
A floating point number is made from 2 parts
The mantissa, m - sets the precision
The exponent, e - sets the dynamic range
The value of the floating point number is m x 2^e
Outline the process where two binary floating point numbers are added together
Align to the number with the largest exponent (e1) by right shifting the mantissa of the number with the smaller exponent (e2) by (e1-e2) places
The numbers can then be added as shown.
m1 x 2^e1 + m2 x 2^e2 = (m1 + (m2 shr e1-e2)) x 2^e1 ; if e1>e2
… = (m2 + (m1 shr e2-e1)) x 2^e2 ; if e2>e1
… = (m1 + m2) x 2^e1 ; if e1=e2
Describe the basic interrupt mechanism.
At the end of the fetch execute cycle the control path will examine the interrupt input when deciding whether to fetch the next instruction; if the interrupt is high the processor will jump to an interrupt service routine (ISR). An ISR is just a specialised kind of function call so the register values, program counter, etc, will be saved on the stack. After servicing the external event the ISR will return, popping the stack as it does so and resume operation from the instruction immediately following the one it was executing when the interrupt was called.
Why is the interrupt mechanism better at handling external events than continuously polling some external flag status?
Interrupts are a better way of handling external events since if polling is used the processor is placed in a continual loop. If the loop contains a large amount of processing as well as testing for the external event, then the response time for handling the interrupt will be long . Alternatively, if the testing loop does little but test for the event, the processor operation will be inefficient. The basic interrupt operation allows the processor to respond to external events on demand.
What is interrupt latency?
Interrupt latency is the time delay between an interrupt being physically signalled and the processor starting to handle the interrupt. Interrupt latencies can be a critical factor in real time control applications where the safety of the system may depend on the system being able to respond to an interrupt within some time period.
Why do some people regard interrupts as inherently unsafe?
it is often difficult to estimate any bound on latency and hence the system response to a given interrupt. There is a question mark over whether small timing variations in the arrival of an interrupt will lead to unintended system behaviour.
Why do RISC machines contain a large number of registers?
The most common instructions were identified as register to register moves. Variables and intermediate results can be stored in registers and then do not require repeated accesses to memory. Procedure calls are also faster as registers can be used for parameter passing
Explain how RISC architecture may improve the fundamental limit on the internal clock speed in a CPU
The simpler control circuitry required for RISC operations reduces the critical delay path allowing higher clock frequencies
What is the fundamental limit in the internal clock speed of a CPU?
The combinational logic delay of the control circuitry
Explain the advantages of Harvard architecture over Von Neumann architecture for digital signal processing
In Harvard architecture, code and data memories are separate and each has its own interface. Thus data memory accesses and code fetches can be fully overlapped leading to a greater processing throughput, a factor which is paramount in DSP applications since the rate of processing effectively dictates the bandwidth of the system.
What is the Von Neumann bottleneck
The conventional Von Neumann architecture has a single memory interface; the same block of memory holds both code and data. This gives flexibility and the simplicity of only requiring one memory interface, although as both code and data have to pass through the same interface, this can act as a bottleneck.
