NP 15-16 Flashcards
(24 cards)
Wire
Net data type, Used for connections, doesnt store
Reg
Variable data type, Stores values
Initial procedure
Executes only once, never repeats
Always procedure
Cyclic event, executes whenever a variable on its sensitivity list is changed
Blocking assignment
Evaluated and assigned in a single step, Statements must be executed before following steps can happen
Nonblocking assignment
Two-stage evaluation, RHS evaluated immediately but not assigned to LHS until all the statements in the current time step are completed
Propagation delay
Time from input changing to output responding
Transport delay
Time taken for signal to propagate along a wire
Combinational behaviour
Output value is purely a function of present input values
Sequential behaviour
Output value is a function of past and present values. The system has memory
Logic synthesis
Transformation of an abstract behavioural model into a circuit implementation using the gates and other logic resources available in the target technology
Implied mode
The operand is specified implicitly in the definition of the opcode.
Immediate mode
The operand is specified in the instruction itself and thus immediately ready for use
Register indirect
Operand is held in a memory cell pointed by the contents of the register.
Based memory addressing
The instruction contains a pointer to the base address and a displacement.
Synchronous pipeline
Combinational circuitry is divided between synchronous register stages to improve performance.
Why do RISC machines contain a large number of registers?
This is to reduce the number of accesses to main memory which can take several cycles. In comparison to main memory access time to a register is negligible.
What is the principle advantage gained by reducing the number of instructions available in a RISC machine?
It leads to simpler logic for decoding and execution, freeing up more space for registers
Why is the instruction set in a RISC machine limited to simple instructions?
The simpler instructions can be executed on a single cycle
Describe a CPU
A CPU consists of a datapath and control logic. The datapath performs arithmetic and logical operations using registers as temporary storage. The control unit determines the sequence of these operations by decoding and executing instructions from the program. Some status information is fed back to the control path and can be used to make decisions on the program flow.
What is the advantage of the microcoding approach?
It is easier to design and modify, particularly for complex control paths.
Describe these areas of a simple microcoder:
- Instruction Register
- Mapping Logic
- Control Address Register
- The Control Memory
- The instruction register holds the opcode of the machine instruction which is to be translated into a sequence of micro instructions
- The Mapping logic determines the address in the control memory at the start of the sequence of micro instructions
- The Control Address Register holds the address of the current micro instruction. The value in the register is incremented by the system clock to advance through the sequence of micro instructions.
- The control memory is a red only memory, the contents of which are fixed at the point of manufacture. The control memory holds the sequence of micro-instructions corresponding to a given opcode, stored in ascending locations.
What is the disadvantage of the simple microcoding arrangement?
The principal disadvantage of the simple micro-coder is that the control memory can become very large.
How can vertical micro-coding address the problem with simple microcoders?
Vertical microcoding implements what are effectively compression techniques, which instead of directly encoding the micro instructions, hold the information in a form that can be recovered by a look up table. The disadvantage of this is that the additional processing steps can limit the overall clock speed of the processor.
