Processor Architecture Summary Flashcards
Summarise PA (22 cards)
Define Micro-architecture.
arrangement of registers, ALUs, FSMs, memories and other logical building blocks needed to implement architecture.
Define datapath.
Made up of memories, registers, ALUs and multiplexers. //operates on 32 bit// //it's basically made up of all the components learned when tracing paths//
What does the control unit do?
produces signals to control the operation of the datapath.
How many instructions can execute simultaneously for a pipelined processor?
5.
Define 5 stages of a single-cycle processor.
Fetch: read instruction from IM.
Decode: read source operands from register file and decodes the instruction to produce signals.
Execute: ALU computes current instruction.
Memory: read or writes data to memory.
Writeback
processor writes result to register if applicable.
What does computer performance depend on?
- Processor performance
- Memory system performance
One Benefit and Con of using fully associate cache?
Reduces conflict misses. Extremely expensive to build
What uses the virtual address?
Programs
Where is the virtual address stored?
Harddrive.
Where is the physical address stored?
DRAM adresses.
How are virtual addresses translated into physical (DRAM) addresses?
Via the CPU.
Where is the data not in DRAM fetched from?
Harddrive.
What is the physical address comparable to?
The cache.
Where are most accesses hit?
Physical memory (remember it’s like the cache)
What do I/O interfaces do?
Manage comms. between peripherals and computer.
What does the clock do?
Generates signals for timers, PWM and other peripherals.
What does the prescalar do?
Prescalar divides the clock feeding timer.
Timer freq.=syst. CLK speed/(prescalar+1).
What does the Auto-Reload-Register do?
The ARR further divides the system to give the timer frequency.
Timer freq. = Syst. CLK speed/(prescalar+1)*ARR.
What happens when an external interrupt (EXTI) is raised?
The MCU stops its current task, branches to an interrupt service routine (ISR) for the EXTI raised, then returns to the previous task after the ISR is executed.
Differences between serial and parallel I/O?
Parallel has multiple bits per transmission whilst serial has a single bit per transmission and is faster.
What is special about a Universal Asynchronous Receiver/ Transmitter (UART)?
A UART doesn’t need a CLK to function.
Describe I2C interface.
Interface requires two lines:
SDA-bidirectional signal.
SCK-clock signal.
