Processor Components Flashcards
(13 cards)
Control Unit
Control signals sent along the control bus between the CU and other components
Buses
Series of wires - transfers signals between internal components. Has 8,16,32 or 64 lines (doesn’t hold data, only transfers)
Memory Read
Data from addressed location in RAM to be placed on the data bus
Memory Write
causes data to be written into addressed location.
Clock
synchronises the computers actions on a pulse
Logical Operations
AND,OR,NOT,XOR
Program Counter
holds memory address of next instruction to be executed, incremented by 1
Current Instruction Register (CIR)
Holds current instructions, split into opcode and operand
Memory Address Register (MAR)
holds the address in memory where the processor is required to fetch or store data from or to (undirectional)
Memory Data Register
Temporarily holds data moving between the processor and main memory.
Fetch Phase
1) The address of the next instruction is copied from PC to MAR
2) The instruction held at the address is copied to the MDR
3)Simultaneously, the contents of the Program Counter are incremented
4) The contents of the MDR to the current instruction register
Decode Phase
- The instructions held in the CIR are decoded
- It is then split into operand and opcode to determine the type of instruction it is. Additional data, if required, is fetched from memory
Execute Phase
- CIR contents are passed to the accumulator
- The instruction is executed and the result held in the accumulator or main memory
