slr1 - Structure and function of the CPU Flashcards

1
Q

What is the role of the control unit

A

Controlling and coordinating the activities of the CPU
Managing the flow of data between the CPU and other devices
Accepting the next instruction
Decoding instructions
Storing the resulting data back in memory

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2
Q

Which register Accepts the next instruction and decodes it

A

Control unit

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3
Q

What is stored in the program counter

A

The address of the next instruction in memory that the processor needs to execute

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4
Q

At the start of every fetch decode execute cycle where is the address in the PC copied to

A

The Memory Address Register

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5
Q

What is stored in the MAR

A

The address of the memory location data or instructions are to be read from or written to memory

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6
Q

Which register sends addresses to memory

A

MAR

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7
Q

Which bus only transfers data in one direction

A

Address

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8
Q

What is the role of the address bus

A

Transmits memory addresses from the processor to other parts of the system

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9
Q

What is stored in the MDR

A

Data which is read from or written to memory

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10
Q

What can the MDR also be called

A

“Memory Buffer Register” or “the gateway to the processor”

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11
Q

Where must all data going to and coming from memory pass through

A

The Memory Data Register

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12
Q

Which bus is responsible for transferring data to and from memory

A

Data Bus

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13
Q

Name the three buses

A

Control
Address
Data

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14
Q

What is held in the CIR

A

The current instruction being executed

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15
Q

If the data stored in the MDR is an instruction where is it copied to

A

The CIR

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16
Q

What is stored in an instruction

A

Opcode and Operand

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17
Q

What is opcode

A

The instruction being executed

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18
Q

What is the Operand

A

Which address in memory to execute it on

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19
Q

What is the role of the ALU

A

Performs arithmetic and logical operations on data

20
Q

What are the 3 types of operation

A

Arithmetic
Bitwise
Boolean logic

21
Q

what are bitwise operations

A

Operations that manipulate the individual bits of binary data

22
Q

What is stored in the accumulator

A

The result of calculations carried out by the ALU

23
Q

What is the role of general purpose registers

A

They temporarily store data within the CPU

24
Q

What is the role of the control bus

A

Sends command and control signals to and from every component of the computer

25
What is carried by the data bus
The actual 1s and 0s that make up the information being transmitted around the CPU
26
What is the role of the decode unit
Prepares the execution of an instruction by looking up the binary operation code
27
What is the stored in the status register
Information about the status of the CPU
28
What is the role of the clock
Synchronises components by generating pulses at a fixed rate
29
What are the 3 main factors affecting the speed of a CPU
Clock speed Cache size Number of cores
30
How does clock speed affect the speed of a processor
higher clock speed means more FDE cycles per second
31
Why does cache size affect processor speed
A larger cache means that the cpu can have faster access to more instructions
32
What is cache
Small memory located on or near the CPU that temporarily stores data and instructions for faster access
33
Why is cache better than main memory
Cache is faster to access
34
describe a core
A complete copy of a CPU that contains all of the necessary registers
35
Why does the number of cores affect performance
CPUs with more cores have more power to run multiple programs at the same time
36
Why does doubling the number of cores not double the performance of a CPU
CPU cores have to communicate with each other Many programs aren't designed to use multiple cores
37
Describe the difference between a CMP and a CPU
A CMP houses multiple CPU cores
38
What does CMP stand for
Chip Multiprocessor
39
Describe the Von Neumann architecture
Shared memory for instructions and data Instructions and data are stored in the same format Each processor follows a liner fetch decode and execute cycle One instruction at a time Registers are used for fast access to instructions and data
40
Describe the Harvard architecture
Instructions and data are stored in separate memory units Each of which has its own bus Reading and writing can be done at the same time as fetching an instruction Used by RISC processors
41
How do contemporary architectures differ from older architectures
They can make use of SIMD and MIMD
42
Describe SIMD
Where the processor uses parallel processing to carry out a single instruction on multiple items of data at the same time
43
Describe MIMD
Another version of parallel processing where multiple instructions are carried out on different data items across multiple cores
44
What is distributed computing
Where multiple computers on a shared network each take on part of a larger problem
45
What is a register
Small memory units that operate at a very high speed
46
What are the 6 instruction that can be sent down buses
Request Grant Memory write Memory read Interrupt request Clock