SS Flashcards

(19 cards)

1
Q

Software

A

collection of programs,procedures,routines associated with the opeartion of the computer system

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2
Q

Application and System software

A

Application s/w performs specific tasks for the end user as per the req,SS consists of a variety of programs that support the operation of a computer

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3
Q

SS VS Appln

A

SS
type of software which is the interface between applicaiton s/w and the system
Its intended to support the operation and make use of the computer system
developed in low level language
installed on the computer when os is installed
less or no user interactions
depends on machine architecture
compiler

Appln
type of software which runs as per the user request
concerened mainly with the solution of the problem
deploped in high level languages
used by users to perform a specific task
more user interaction
independant on machine architecture
web browser

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4
Q

Compiler:

A

Translates entire high-level source code into machine code (binary) in one go.
Detects and reports errors after scanning the whole code.
Produces an executable file (like .exe).

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5
Q

Interpreter:

A

Translates high-level code into machine code line by line.
Stops execution and reports errors immediately when found.
Does not generate an independent executable file.

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6
Q

Assembler:

A

Converts assembly language (low-level code) into machine code.
Works with hardware-specific instructions.
Produces an object code or executable.

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7
Q

Linker:

A

Combines multiple object files (from compiled code) into a single executable file.
Resolves symbol references (like functions or variables) across different modules.
Can link libraries (precompiled code) to the main program.

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8
Q

Loader:

A

Loads the executable file into memory for execution.
Allocates memory space for the program and its data.

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9
Q

Debugging:

A

Identifies, analyzes, and fixes errors (bugs) in a program.
Involves testing code to find issues such as logic errors, crashes, or incorrect outputs.

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10
Q

SIC Architecture(Standard Model)

A

Simplified Instruction Computer is a hypothetical model designed to include the hardware features which are most often found on real time machines

Memory
consists of 8 bit bytes,3 consecutive bytes form a word(24 bits)
addresses on SIC is byte address
there are a total of 2^15(32768) bytes in computer memory

Registers
5 24 bit registers
A - accumulator (arithemetic operations)
X - index register (used for addressing)
L - Linkage register(JSUB stores return address in this register)
PC
SW - Status Word,contains a variety of info including a condition code(cc)

Data Formats
Integers are stored as 24 bit binary numbers
negative numbers are stored as 2’s compliment
charecters are stored using their 8 bit ASCII code
no float

Instruction Format
24 bit
8 for opcode 1 for X and 15 for address

Addressing Modes
direct addressing mode(x=0)
here the target address is specified by the actual adrdress itself

Indexed(x=1)
here the target address is computed by adding the acutal address specified in the instruction and the contents of the index register

Instruction Set
Load and store registers
LDA,STA,LDX,STX,LDL,STL
Instructions for interger arithmetic operations
ADD,SUB,MUL,DIV
all operations involve register A and a word in memory with result being left in register
Instruction COMP
Compares the value in A with word in mmy,this sets a conditional code,CC indicate the result(<,=,>)
Conditional Jump
JLT,JEQ,JGT
subroutine linkage
JSUB,RSUB
I/O instructions
performed by transferring 1 byte at a time to or from the rightmost 8 bits of A
each device is assigned a unique 8 bit code
TD(to test if device is ready)<-ready,=-not ready
then RD and WD

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11
Q

Assembler Directives

A

START -specify name and starting address of pgm
END - indicates the end of the source program
BYTE-generate charecter or hex constant(3 bytes in size) bytename byte value(C’z’)
WORD-generate one word integer constant(3 bytes in size) Wordname word value(5)
RESB/RESW Reserve the indicated no of bytes/words for a data area resb/reswname resb/resw size

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12
Q

Programs

A

DATA MOVEMENT
LDA FIVE
STA ALPHA
LDCH CHARZ
STCH C1

CH is used for charecter transactions(still goes into A)
A - directly into A

ARITHEMETIC
BETA=(ALPHA+INCR-1)

LDA ALPHA
ADD INCR //adds contents of A with INCR
SUB ONE //subtracts A with 1
STA BETA //Stores the values of A in BETA

ONE WORD 1

APLHA RESW 1
BETA RESW 1
GAMMA RESW 1
DELTA RESW 1
INCR RESW 1

INPUT OUTPUT Operation

INLOOP TD INDV
JEQ INLOOP
RD INDEV
STCH DATA
.
.
OUTLOOP TD OUTDEV
JEQ OUTLOOP
LDCH DATA
WD OUTDEV
.
.

INDEV BYTE X’f1’ IP number
OUTDEV BYTE X’05’ OP number
DATA RESB 1

LOOPING AND INDEXING

LDX ZERO MOCH	LDCH STR1,X
STCH STR2,X
TIX ELEVEN //ADD 1 TO INDEX COMPARE RESULT TO ELEVEN
JLT ELEVEN //LOOP IF INDEX>11 . . STR1 BYTE C'TEXT STRING' STR2 RESB 11 ZERO WORD 0 ELEVEN WORD 11

SUBROUTINE CALL

JSUB READ

READ LDX ZERO
RLOOP TD INDEV
JEQ RLOOP
RD INDEV
STCH RECORD,X
TIX K100
JLT RLOOP
RSUB

INDEV BYTE X’F1’
RECORD RESB 100

ZERO WORD 0
K100 WORD 100

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13
Q

SIC/XE ARCHITECTURE

A

MEMORY
8 bit bytes
3 bytes form word
all addresses are byte addresses
max memory is 20^20(1MB)

REGISTERS
9 register 24 bit except for F(48)bits

A 0
X 1
L 2
B 3 BASE REGISTER
S 4 GNERAL WORKING REGISTER
T 5 GNERAL WORKING REGISTER
F 6 FLOAT POINT ACCUMULATOR
PC 8
SW 9

data format
same as SIC except it had floating point data(48 bit)

fp format
s(1) exponent(11) fraction(36)
s-sign

Instruction format
4 instruction formats
format 1-4(1,2,3,4 bytes)

Format 1
opcode(8) eg:RSUB
Format 2
opcode(8) R1(4) R2(4) eg:COMP A,S
Format 3
opcode(8) N I X B P E(1 each) disp(12) eg LDA #3
Format 4
opcode(8) N I X B P E(1 each) Address(20) eg JSUB READ

Addressing Modes
N-Indirect
@ is used

I-immediate
# is used

X-Indexed
1=x register is used

B-Base relative
TA=B+disp(0-4095)

PC-program counter RElative
TA=(pc)+disp(-2048-2047)

E-indicates the format
0=3
1=4

INSTRUCTION SET(includes all from SIC)

load/store
STB,LDB

FP arithemetic operations
ADDF,SUBF,MULF,DIVF

take operand from register
RMO

Instruction for register(register arithemetic operations(
ADDR,SUBR,MULr,DIVR

Special instrutction
SVC(supervisor call)-generates an interrupt
LPS(load processor status)-stores CPU status and register contents when interrupt occurs

compare
COMP,COMPR

I/O

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14
Q

SIC/XE PROGRAMMING

A

DATA MOVEMENT
LDA #5
STA ALPHA
LDA #90
STCH C1

ALPHA RESW 1
C1 RESW 1

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15
Q

forward reference

A

reference to a label thats define d later in the program,we are unable to process this statement bcz we dont know the address thats assigned to the referenced variable bcz of this most assemblers make 2 passes over the source program

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16
Q

PASS 1

A

begin
read first input line
if OPCODE = ‘START’ then
begin
save #[OPERAND] as starting address
initialize LOCCTR to starting address
write line to intermediate file
read next input line
end (if START)
else
initialize LOCCTR to 0
while OPCODE != ‘END’ do
begin
if this is not a comment line then
begin
if there is a symbol in label field then
begin
seach symtab for label
if found then
error(duplicate symbol)
else
insert(label,locctr) into symtab
end(if symbol)
search optab for opcode
if found then
add 3(instruction length into locctr)
else if OPCODE = ‘WORD’ then
add 3 to LOCCTR
else if OPCODE = ‘RESW then
add 3 * #[OPEARAND] to LOCCTR
else if OPCODE = ‘RESB’ then
add #[OPERAND] to LOCCTR
else if OPCODE =’BYTE’ then
begin
find of length of constant in bytes
add length to LOCCTR
end(if BYTE)
else
set errror flag(invalid OPCODE_)
end(if not comment)
write line to intermediate file
read next i/p line
end(while not END)
write last line to intermediate file
save(LOCCTR - STARTING address) as program length)
end(pass 1)

17
Q

PASS 2

A

performs the actual translation(generates object code)

begin
read first input line {from intermediate file}
if OPCODE = ‘START’ then
begin
write listing line
read next input line
end {if START}
write Header record to object program
initialize first Text record
while OPCODE ≠ ‘END’ do
begin
if this is not a comment line then
begin
search OPTAB for OPCODE
if found then
begin
if there is a symbol in OPERAND field then
begin
search SYMTAB for OPERAND
if found then
store symbol value as operand address
else
begin
store 0 as operand address
set error flag (undefined symbol)
end
end {if symbol}
else
store 0 as operand address
assemble the object code instruction
end {if opcode found}
else if OPCODE = ‘BYTE’ or ‘WORD’ then
convert constant to object code
if object code will not fit into the current Text record then
begin
write Text record to object program
initialize new Text record
end
add object code to Text record
end {if not comment}
write listing line
read next input line
end {while not END}
write last Text record to object program
write End record to object program
write last listing line
end {Pass 2}

18
Q

ASEEMBLER O/P format

A

Header - program name starting address and length in bytes

Text records-instructions together with an indication of addresses

end record-marks the end of the object program

19
Q

ASSEmbler data structures

A

OPTAB
used to look up mneumonic codes and translate them to machine language equivalents
optab is searched in the first pass to find the length for inncrementing locctr
in second pass it tells what instruction foprmat to use
static table

SYMTAB
used to store address assigned to labels
includes name and address together with flags
name | address

LOCCTR
used to help in the assignment of addresses