Structure and Function of Processor

Question 1

What are the 4 functions of the Control Unit? (CU)

Answer 1

Coordinates all activities of the CPU.

Directs flow of data between CPU and other devices.

Decodes instructions

Sends read/write requests to main memory on the Control bus

Question 2

What is the function of the PC?

Answer 2

Holds the address of the next instruction to be executed.

Can be changed to address in CIR if operation is a Jump.

Question 3

What are the 2 functions of the Memory Address Register? (MAR)

Answer 3

Holds the address of the location in memory to be read from/written to.

Sends these addresses to RAM down the Address bus

Question 4

What is the function of the Memory Data Register? (MDR)

Answer 4

Temporarily stores data which is read from/to be written

Sends/receives data down the Data Bus

Question 5

What are the 3 functions of the Current Instruction Register? (CIR)

Answer 5

Holds the current instruction being executed

If contents of MDR are an instruction, it is copied to CIR

Contains the opcode and operand of the current instruction.

Question 6

What are the 2 functions of the Arithmetic Logic Unit? (ALU)

Answer 6

Performs arithmetic and logical operations on data

Arithmetic -> +, -, *, /
Logical -> <, >, !=, ==
Boolean -> AND, OR, NOT, XOR

Question 7

What is the 4 functions of the Accumulator? (ACC)

Answer 7

Holds all input/output

Temporarily stores calculations from ALU for quick retrieval.

Stores data from MDR and RAM

Checked for conditional branching (e.g. BRZ)

Question 8

What is a register?

Answer 8

A small piece of memory used for storing data within the processor

Question 9

What are buses?

Answer 9

Sets of wires that connect two components together so that they can communicate

Question 10

What is the function of the Address Bus?

Answer 10

Carries memory addresses that identify where data is being read from/written to

Uni-Directional (1 way)

Question 11

What is the function of the Data Bus?

Answer 11

Carries the binary 1s and 0s that make up the actual information being transmitted around the CPU

Question 12

What is the function of the Control Bus?

Answer 12

Carries commands and control signals to and from every other component in the CPU.

e.g. Memory read or memory write

Question 13

Explain the FETCH process of the FDE cycle

Answer 13

Address stored in PC is copied to MAR.

PC increments by 1.

That address is then sent along the address bus to RAM, where it waits for a signal form the control bus.

Then CU sends a READ signal along the control bus to RAM.

Now that RAM knows the contents need to be READ, it sends the data down the data bus to the MDR.

Data in MDR copied over to CIR

Question 14

Explain the DECODE process of the FDE cycle.

Answer 14

Instruction in the CIR is decoded into Opcode and Operand.

Opcode: What to do
Operand: What/Where to do it to

Question 15

Explain the EXECUTE process of the FDE cycle.

Answer 15

The Opcode and Operand are sent from the CIR to the ALU where the instruction is carried out.

Results stored in ALU

Question 16

What are 3 factors affecting the performance of the CPU?

Answer 16

Clock Speed
Number of Cores
Cache

Question 17

What are the 3 buses in the CPU collectively known as?

Answer 17

The System Bus

Question 18

What is the function of the System Clock?

Answer 18

Synchronises the operation of the Processor.

Question 19

What is Clock Speed?

Answer 19

The max number of FDE cycles per second.
Usually measured in GHz

Question 20

What is a Core?

Answer 20

A separate processor that is able to run its own FDE Cycle

Question 21

Why does Number of Cores affect CPU performance?

Answer 21

A CPU with more cores can complete more FDE cycles at any given time.

In theory, a computer with dual cores can complete tasks 2x as fast a single core computer.

Question 22

What is the downside of Number of Cores?

Answer 22

Not all programs are able to utilise multiple cores efficiently as they have not designed to do so

Question 23

What is Cache?

Answer 23

Fast, small capacity set of memory that sits close to the processor

Stores the most frequently used instructions and data.

L1: Part of core circuitry - smallest and fastest
L2: Shared by cores
L3: On motherboard
L4: Near/on the processor - largest and slowest

Question 24

What is Pipelining?

Answer 24

Allows concurrent processing of multiple instructions!!!

Allows one instruction to be fetched as the previous one is being decoded, and the one before that being executed.

Meaning more instructions can be carried out in a set amount of time.

Question 25

What are the features of Von Neumann Architecture?

Answer 25

Uses the same memory for data and instructions
Single set of buses
Same bus for data and instructions

Single Control Unit
Single ALU

Follows FDE

Question 26

What are the features of Harvard Architecture

Answer 26

Keeps instruction and data in separate memories
Each memory can be a different size
Separate buses for each memory

Instructions and data can be fetched at the same time!

Used extensively in embedded systems

Question 27

What are the features of Contemporary Processors?

Answer 27

Use a combination of Von Neumann and Harvard

Von tends to be used with RAM
Harvard tends to be used with Cache