Technology trends

Question 1

What is Moore’s law?

Answer 1

Prediction that the number of transistors doubles every 18 months

Question 2

What are some trends that have increased over the years? (5)

Answer 2

Number of transistors

Single-thread performance

Frequency

Typical Power (Watts)

Number of logical cores

Question 3

What is Dennard scaling?

Answer 3

As transistors gets smaller, their power density remains constant. It’s an observation of how parameters are affected when transistors are scaled down.

Scale the dimensions of the transistors (transistor gate) with a factor of k.

Transistor dimension: 1 / k (if k=2, scale by half, length is 1/2 and height is 1/2)

Voltage: 1 / k

Delay time (electrons move over shorter distance, this improves speed): 1 / k

Power consumption for the original area(remains the same): 1

Question 4

Why doesn’t wires scale as good as transistors?

Answer 4

When you scale down the size of wires, the resistance increases and the wire becomes slower.

Question 5

Why has power usage not continued to increase from around 2003?

Answer 5

Have become power limited.

Need to add cooling, which is very expensive.

Question 6

How does moore’s law and dennard scaling connect?

Answer 6

Moore’s law predict that transistor dimensions scale with 30%. This means that area shrinks with 50% (0.7 (new height) * 0.7 (new width) = 0.5)

Performance increase with 40%. 30% delay reduction gives 40% (1.4) frequency increase.

The observations done by Dennard explain how this works:
- Voltage reduced by 30%
- Energy reduced by 65%
- Power reduced by 50% (at 1.4 frequency)

Question 7

What are one reason for the big gap between computation time and data transfer time (memory latency)?

Answer 7

Transistors can be scaled down but wires cannot at the same speed without causing increased resistance.

Question 8

How has power increased when looking at technology trends?

Answer 8

Power did not increase due to Dennards scaling, but still increased between 1970 and 2003.

This increase was caused by also increasing the size of chip-area. As processing technologies improves, we are able to build larger chips that does not have faults on them.

The increase is also caused by the want to push the frequency up.

Question 9

What is the speed of a transistor?

Answer 9

The difference between the supplied voltage and the threshold voltage

Question 10

What is threshold voltage?

Answer 10

The minimum voltage needed for a transistor to be turned on

Question 11

How is voltage leakage affected when supply voltage changes?

Answer 11

Leakage increases when supply voltage is lowered.

When supplied power is lowered, the subthreshold voltage must also be lowered.

Question 12

Why does Dennard scaling not apply anymore?

Answer 12

Because dennard did not take into account that leakage increases when supply voltage is lowered.

Question 13

What is the formula for power in a circuit?

Answer 13

P = 0.5 * a * C * f * v^2

C: Capacitance

a: Activity factor, switch factor, with a given clock frequency - how likely is it that the circuit will switch

v: Voltage

Question 14

What is the formula for energy in a cicuit?

Answer 14

E = Capacitive load * v^2

energy is not dependent on frequency (because higher frequency reduces time)

Question 15

What is static power?

Answer 15

Ps = static leakage current * V

Scales with the number of transistors

Question 16

How can static power be decreased?

Answer 16

Using power gating.

Turn off power supply to circuit.

Question 17

How can energy efficiency be improved?

Answer 17

Do nothing well, raise voltage when needed and go to sleep the rest of the time.

DVFS: Dynamic voltage and frequency scaling. Adapt frequency and voltage to work load.

Design for the typical case.

Question 18

What is overclocking?

Answer 18

Have multiple cores, and make CPU being lower than the max thermal value that they can sustain.

The supplied voltage is at the lower level, but if we need more performance and the chip is cool, we can increase the core (voltage?)

When all cores on a chip is utilized, all of them can boost a little bit when needed. When fewer cores are utilizzed, each can be boosted slightly more.

Question 19

What is intel’s FinFet design?

Answer 19

Raising the gate, which decrease leakage.

Question 20

What can increase data movement cost?

Answer 20

When data is further from where it needs to be operated on. For example if the data needs to move across a chip, or to a different chip.

Question 21

Why has frequency not increased since around 2003 when looking at technology trends?

Answer 21

No frequency scaling.

Question 22

When looking at technology trends, how are single core design developing?

Answer 22

Signle core performance has stagnated from around 2005, more focus on parallelism and multiple cores

Question 23

When looking at technology trends, how have the number of cores developed?

Answer 23

From around 2005, the focus have been on developing chips with multiple cores instead of single-core processors.

Question 24

Why did we start developing multi-core processors?

Answer 24

Not enough ILP, difficult to detect enough independent instructions to make up for latency.

In multicore systems, can reduce f and V

Complexity wall: Easier to build meny smaller cores

Question 25

What is the formula for power in a multicore system

Answer 25

P = 0.5 * a * C * f * V^2 For one core, a and C are fixed. k = 0.5 * a * C P = k * f * V^2 When reducing frequency and/or voltage in multicore systems, the power reduces quicker

Question 26

What effects performance?

Answer 26

Performance is roughly relative to frequency, which is roughly relative to voltage

Question 27

What is pollack's rule?

Answer 27

Performance increases with the square root of the area (number of transistors) Each new technology gives twice the number of transistors. This gives 40% microarchitectural performance Transistors have an additional increase in performance of 40%

Question 28

What is the productivity wall?

Answer 28

Design productivity cannot keep up with moore's law (increased number of transistors). Meaning it takes longer to be able to design the chips that uses these additional transistors. The verification productivity is again slower than the design productivity. This is the pace in which the new designs are being tested.

Question 29

What is the design gap?

Answer 29

Gap between Moore's law and design productivity

Question 30

What is the verification gap?

Answer 30

Gap between Moore's law and verification productivity

Question 31

What is the productivity gap?

Answer 31

Design- and verification gap

Question 32

What are some downside of multicores? (4)

Answer 32

Require parallell programs: - burden on programmer Limited by Amdahl's law Increases bandwidth requirements Cache coherency

Question 33

What are the trends when it comes to bandwidth and throughput?

Answer 33

This is the amount of work or data that we can move over a pin. 10K-25K times improvement for logic movement 300-1.2K stimes improvement for memory and disk movement This means that logic has increased much faster than memory access.

Question 33

What is the I/O pin problem?

Answer 33

The pins are also hard to scale in size, meaning the number of connections between the chip and the outside world are limited. When the number of transistors increase, so does the number of transistor per pin.

Question 34

What is latency and what are the trends when it comes to it?

Answer 34

Time from start to completion of an event. 30-80 times improvement for logic 6-8 times improvement for memory and disk

Question 35

What is the memory wall?

Answer 35

The difference in the improvement of processor performance and memory

Question 36

Does Moore's law still apply?

Answer 36

If the manufacturing cost increase, moore's law might be affected. Transistor sizes has become so small, at the level of a few atoms, meaning pushing the size further down is more difficult.

Question 37

What are heterogeneous architectures?

Answer 37

An alternative when we can no longer increase the number of transistors, and multicore is not enough to improve performance. Use application specific accelerators to complete specific tasks (GPU, encryption, TCP) - e.g. offloading TCP traffic to separate units.

Question 38

What is a challenge that heterogeneous architectures bring? (4)

Answer 38

Software challenge, need to be able to write software to the different accelerators. Portability - one system might not be able to run all software. In hardware, general purpose code behaviour might change. Meaning the code that is left when specific tasks has been off loaded to different units. Would need to optimise for this new behaviour. Efficient data management is also necessary.

Question 39

What is big.LITTLE-software evolution?

Answer 39

When you introduce small (e.g. in-order cores) and large (ooo-cores) on a chip and use the small core for simpler tasks and the larger for more complex. The smaller cores can decrease power a lot, but have limited performance push. The performance comes with the larger cores, but these also increase power.