Unit 1 Flashcards

1
Q

What are the registers and how do they interact with the Fetch decode execute cycle

A

Fetch: Contents of Program Counter / PC are transferred to Memory Address Register / MAR
the address bus is used to transfer this address to main memory

The transfer of content uses the data bus
Contents of addressed memory location loaded into the Memory Data Register /
MDR
Increment (contents of) Program Counter / PC A. at any part of fetch process
after transferring PC to MAR
Increment Program Counter / PC and fetch simultaneously
Contents of MDR copied to CIR
Decode:
Decode instruction held by the (Current) Instruction Register / (C)IR
The control unit decodes the instruction
Instruction split into opcode and operand
Execute:
If necessary, data is fetched
If necessary, data is stored in memory
The opcode identifies the type of operation/instruction to be performed (by the
processor)
Result (may be) stored in register/accumulator
The operation (identified by the opcode) is performed by the processor. A. ALU
Status register updated
If jump / branch required Program Counter/PC is updated
Remember this for full marks in ANY FDE question

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2
Q

What are the busses?

A

Address Bus, Data bus, Control bus

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3
Q

State all registers in the CPU and what they do.

A

Current Instruction Register(CIR)- The register that stores the instruction that is currently being executed

Program Counter(PC)- The register that holds the address of the next instruction to be executed.

Memory Address Register(MAR)- The register that stores the address of the date, or the address of where the data will be sent to

Memory Data Register(MDR)- The register that holds the data being transferred to and from the immediate memory

Accumulator(ACC)- The register which holds an intermediate value in mathematical and logical calculations. This is all for a very short amount of time

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4
Q

What is a data bus and what does it do? (treat this as a high mark question and go into detail)

A

The data bus is one of the three buses of the system. The data bus takes data to/from the memory to/from the CPU. This bus is bidirectional, which means that data is able to travel both ways. The amount of data a data bus is able to transfer at once is called bandwidth. Typical bandwidths are 32 bits, with newer computers being able to handle 64-bit and 96-bit data paths. This means that up to 96 bits of data can travel through a data bus every second.

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5
Q

What are the factors affecting the performance of the CPU?

A

Clock speed: Number of cycles executed per given time

Number of cores: By increasing the number of cores, multiple cycles can be executed at the same time, hence improving performance.

Cache: Cache stores data so that future requests for that data can be served faster, acts like a shortcut between the CPU and the data needed.

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6
Q

What is a control bus and what does it do? (treat this as a high mark question and go into detail)

A

The control bus is one of the three busses of the system.
The control bus controls most of the system. It gives commands to the system and hardware of the computer. These commands are:

Read - A single line that when active (logic zero) indicates the device is being read by the CPU
Write - A single line that when active (logic zero) indicates the device is being written by the CPU
Byte enable - A group of lines that indicate the size of the data (8, 16, 32, 64 bytes)
Transfer ACK - Delivers information that the data was acknowledged (read) by the device
Bus request - Indicates a device is requesting the use of the (data) bus
Bus grant - Indicates the CPU has granted access to the bus
Interrupt request - A device with lower priority is requesting access to the CPU
Clock signal - The signal on this line is used to synchronize data between the CPU and a device
Reset - If this line is active, the CPU will perform a hard reboot

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7
Q

What is an address bus and what does it do? (treat this as a high mark question and go into detail)

A

An address bus is a computer bus architecture used to transfer data between devices that are identified by the hardware address of the physical memory (the physical address), which is stored in the form of binary numbers to enable the data bus to access memory storage

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8
Q

What is the Von Neumann architecture, and what is it used for?

A

The Von Neumann architecture consists of:

  • a single, shared memory for programs and data
  • a single bus for memory access (MAR)
  • an arithmetic and logic unit (ALU)
  • a program control unit (PC)

Von Neumann architecture is used for the operation of the Fetch, Decode and Execute cycle.

Mostly used in desktop computers, laptops, workstations and high performance computers.

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9
Q

What is the Harvard architecture? Where is it used?

A

The Harvard architecture is a computer architecture with separate storage and signal pathways for instructions and data. It usually is used in simple programs such as microwaves toasters fridges etc..

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10
Q

What is contemporary processor architecture? Where is it used?

A

Contemporary Processing - Contemporary processors use a ​combination of Harvard and Von Neumann​ architecture. Used in modern day processors

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11
Q

What is RISC? Where is it used?

A

RISC stands for Reduced Instruction Set Computer.

RISC is designed to perform a smaller number of types of computer instructions so that it can operate at a higher speed, which allows this type of processors to perform more instructions per second compared to CISC.

It is mostly used in:

  • Low-end and mobile systems,
  • Desktop and laptop computers.
  • Workstations, servers, and supercomputers.
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12
Q

What are GPUs and their uses(besides graphics)?

A

Graphics processing unit, a specialized processor originally designed to accelerate graphics rendering. Made up of hundreds of smaller processors. USED FOR MACHINE LEARNING AND CRYPTOCURRENCY MINING

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13
Q

What is the difference between CISC and RISC?

A

CISC: Complex instructions, less lines of instructions.
RISC: Simpler instructions, more lines of instructions.

The CISC approach attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction.

RISC does the opposite, reducing the cycles per instruction at the cost of the number of instructions per program.

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14
Q

What is the difference between RAM and ROM?

A

RAM (Random Access Memory): Volatile memory, processed data that is currently in use.

ROM (Read Only Memory): Non-Volatile memory, contains the programming that allows a computer to start up or regenerate each time it is turned on.

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15
Q

What is optical, flash and magnetic storage - benefits and disadvantages?

A

Flash storage is a data storage technology based on high-speed, electrically programmable memory. The speed of flash storage is how got its name: It writes data and performs random I/O operations in a flash. Flash storage uses a type of nonvolatile memory called flash memory.
Increased Durability. Unlike traditional hard-disk drives, flash drives lack moving parts.
Portability - Cheap - Easy to use
Dis - Easy to break - Can be scratched cannot rewrite

In optical-storage technology, a laser beam encodes digital data onto an optical, or laser, disk in the form of tiny pits arranged in a spiral track on the disk’s surface.

Magnetic storage uses different patterns of magnetisation on a magnetisable material to store data. The data is accessed using read/write heads. Related Content: Memory and Storage.

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16
Q

What is a Parallel system?

A

Parallel systems are systems that can process the data simultaneously, and increase the computational speed of a computer system.

In these systems, applications are running on multiple computers linked by communication lines.

17
Q

What is Multicore processor?

A

A multicore processor is an integrated circuit that has two or more processor cores attached for enhanced performance and reduced power consumption.

18
Q

What is virtual memory and when is it used?

A

Virtual memory is a section of volatile memory created temporarily on the storage drive. It is created when a computer is running many processes at once and RAM is running low.