Unit 1 - Computer Components Flashcards
define control unit
-the part of the CPU that manages the execution of instructions. it fetches, decodes and synchronises instructions before executing it by sending control signals via the control bus to other parts of the computer
define buses
a common physical pathway shared by signals to and from several components of a computer
define ALU
arithmetic logic unit - where data is processed and manipulated by performing arithmetic, logic and shift operations allowing a program to make decisions
define accumulator
holds all inputs/outputs, holds results of any calculations, checked for conditional branching, stores data from the MDR/RAM
define CPU
central processing unit - the main part of the computer, consisting of the registers, ALU and CU
- processes instructions and runs the OS
name the 5 main registers
- PC
- CIR
- MAR
- MDR
- ACC
function of the program counter
holds the memory address of the next instruction to be executed
function of CIR
current instruction register - holds the address of the current instruction being executed and decoded, which is split into opcode and operand
function of MAR
memory address register - holds the address of the memory location currently in use
fetch - address of the instruction being loaded
execute - address of the data being used
function of MDR
memory data register - acts as a buffer by temporarily holds data moving between the processor and main memory
steps in the fetch stage of the FDE cycle
- address of instruction moved from PC to MAR
- data/ instruction held at the address is moved to MDR
- PC incremented by 1
- contents of MDR moved to CIR
steps in the decode stage of the FDE cycle
- instruction in CIR decoded
- split into operand and opcode to determine the type of instruction. (additional data fetched if required)
- passed to the ACC
steps in the execute stage of the FDE cycle
- the instruction is executed and result held in ACC or stored in memory
what is the opcode
specifies the operation to be carried out
what is the operand
holds either:
- the address of the data to be used, which is then copied to the MAR
- the actual data to be operated on, which is passed to the MDR
define words
sections of memory that each hold a seperate memory address
function of the address bus
the part of the bus which carries identification about where data is being sent
- the width of the address bus determines the maximum possible memory addresses of the system
function of the data bus
the part of the bus that carries the actual information
- bi-directional so data can be sent both ways along the bus. the width of the data bus is defined by the number of wires or lines it contains.
what determines machine code format
architecture of the computer
- including word size and bus width
what are three factors affecting performance
- clock speed
- number of cores
- amount and level of cache
how does clock speed affect processor perfomance
FDE cycle is triggered by the clock pulses from the system clock the faster the clock speed the greater number of cycles per minute
how does the number of cores affect processor performance
each core is theoretically able to process a different instruction at the same time with its own FDE cycle, making a quad core computer up to four times faster than a single core processor
why might an increased number of cores not affect processor performance
the software may not be able to take full advantage of all multiple processors
define parallel processing
using several processor cores working at the same time
advantage of parallel processing
if the system is designed for parallel processing, each core can work concurrently on different parts of the same time therefore reducing time taken to complete
why does the amount and type of cache affect processor performance
the more and higher level cache memory a computer has, the more likely it is that it will not have to fetch the next instruction or data from RAM, as it will already have been loaded into the super fast cache memory from which it can be retrieved more easily
define cache
a small amount of super fast memory between the central processor and main memory that stores data and instructions that have recently to take advantage of its short fetch cycle
why does the location of the cache affect processing performance
cache is located on the cpu and therefore it takes less time to fetch instructions/data and copy them to the corresponding registers
factors of level 1 cache
- memory split into instruction cache and data cache, so that data and instructions can be fetched simultaneously
- extremely fast
- very small
- 2 - 256KB
factors of level 2 cache
- very fast but slower than level 1
- 290KB - 8MB
factors of level 3 cache
- slowest but still faster than RAM
- shared between all cores on the processor
- 4MB - 50 MB
define pipelining
an instruction can be fetched as the previous one is being decoded and the one before that is being executed
- successive steps of an instruction sequence are executed in turn by a sequence of cores able to operate concurrently, so that another instruction can be begun before the previous one is finished
define input devices
transfers data from the source in the outside world to a computer
- some require greater human intervention to generate the data
examples of manual input devices
- keyboards
- pointing devices (mouse)
- microphones
- touch screens
what are the two types of bar codes
- universal product code
- code 128
uses of 3-D scanners
- face recognition
- industrial and medical fields
